ZHCSBC3F July 2013 – February 2020 TAS5760M
PRODUCTION DATA.
As shown in Figure 49, a single-byte data-write transfer begins with the master device transmitting a START condition followed by the I²C and the read/write bit. The read/write bit determines the direction of the data transfer. For a data-write transfer, the read/write bit is a 0. After receiving the correct I²C and the read/write bit, the TAS5760M responds with an acknowledge bit. Next, the master transmits the address byte corresponding to the TAS5760M register being accessed. After receiving the address byte, the TAS5760M again responds with an acknowledge bit. Next, the master device transmits the data byte to be written to the memory address being accessed. After receiving the data byte, the TAS5760M again responds with an acknowledge bit. Finally, the master device transmits a STOP condition to complete the single-byte data-write transfer.