ZHCSDC1D September 2013 – October 2018 TAS5766M , TAS5768M
PRODUCTION DATA.
The audio interface port is a 3-wire serial port with the signals LRCLK (pin 15), BCLK (pin 13), and DIN (pin 14). BCLK is the serial audio bit clock, used to clock the serial data present on DIN into the serial shift register of the audio interface. Serial data is clocked into the TAS576xM on the rising edge of BCLK. LRCLK is the serial audio left/right word clock.
| FORMAT | DATA BITS | LRCLK | SCH RATE | BCLK RATE |
|---|---|---|---|---|
| I2S/LJ | 32, 24, 20, 16 | 44.1 or 48 kHz | 128–3072 | 64, 48, 32 |
| TDM | 32, 24, 20, 16 | 44.1 or 48 kHz | 128–3072 | 128, 265 |
The TAS576xM requires the synchronization of LRCLK and system clock, but does not require a specific phase relation between LRCLK and system clock.
If the relationship between LRCLK and system clock changes more than ±5 SCLK, internal operation is initialized within one sample period and analog outputs are forced to the bipolar zero level until resynchronization between LRCLK and system clock is completed.