ZHCSJM6A April 2019 – October 2019 TAS6421-Q1
PRODUCTION DATA.
As shown in Figure 32, a single-byte data-write transfer begins with the master device transmitting a start condition followed by the I2C device address and the R/W bit. The R/W bit determines the direction of the data transfer. For a write data transfer, the R/W bit is a 0. After receiving the correct I2C device address and the R/W bit, the device responds with an acknowledge bit. Next, the master transmits the address byte or bytes corresponding to the internal memory address being accessed. After receiving the address byte, the device again responds with an acknowledge bit. Next, the master device transmits the data byte to be written to the memory address being accessed. After receiving the data byte, the device again responds with an acknowledge bit. Finally, the master device transmits a stop condition to complete the single-byte data-write transfer.