ZHCSFZ6 December   2016 TAS6422-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. 说明(续)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. Parameter measurement Information
  10. 10Detailed description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1  Serial Audio Port
        1. 10.3.1.1 I2S Mode
        2. 10.3.1.2 Left-Justified Timing
        3. 10.3.1.3 Right-Justified Timing
        4. 10.3.1.4 TDM Mode
        5. 10.3.1.5 Supported Clock Rates
        6. 10.3.1.6 Audio-Clock Error Handling
      2. 10.3.2  High-Pass Filter
      3. 10.3.3  Volume Control and Gain
      4. 10.3.4  High-Frequency Pulse-Width Modulator (PWM)
      5. 10.3.5  Gate Drive
      6. 10.3.6  Power FETs
      7. 10.3.7  Load Diagnostics
        1. 10.3.7.1 DC Load Diagnostics
        2. 10.3.7.2 Line Output Diagnostics
        3. 10.3.7.3 AC Load Diagnostics
      8. 10.3.8  Protection and Monitoring
        1. 10.3.8.1 Overcurrent Limit (ILIMIT)
        2. 10.3.8.2 Overcurrent Shutdown (ISD)
        3. 10.3.8.3 DC Detect
        4. 10.3.8.4 Clip Detect
        5. 10.3.8.5 Global Overtemperature Warning (OTW), Overtemperature Shutdown (OTSD)
        6. 10.3.8.6 Channel Overtemperature Warning [OTW(i)] and Shutdown [OTSD(i)]
        7. 10.3.8.7 Undervoltage (UV) and Power-On-Reset (POR)
        8. 10.3.8.8 Overvoltage (OV) and Load Dump
      9. 10.3.9  Power Supply
        1. 10.3.9.1 Vehicle-Battery Power-Supply Sequence
        2. 10.3.9.2 Boosted Power-Supply Sequence
      10. 10.3.10 Hardware Control Pins
        1. 10.3.10.1 FAULT
        2. 10.3.10.2 WARN
        3. 10.3.10.3 MUTE
        4. 10.3.10.4 STANDBY
    4. 10.4 Device Functional Modes
      1. 10.4.1 Operating Modes and Faults
    5. 10.5 Programming
      1. 10.5.1 I2C Serial Communication Bus
      2. 10.5.2 I2C Bus Protocol
      3. 10.5.3 Random Write
      4. 10.5.4 Sequential Write
      5. 10.5.5 Random Read
      6. 10.5.6 Sequential Read
    6. 10.6 Register Maps
      1. 10.6.1  Mode Control Register (address = 0x00) [default = 0x00]
      2. 10.6.2  Miscellaneous Control 1 Register (address = 0x01) [default = 0x32]
      3. 10.6.3  Miscellaneous Control 2 Register (address = 0x02) [default = 0x62]
      4. 10.6.4  SAP Control (Serial Audio-Port Control) Register (address = 0x03) [default = 0x04]
      5. 10.6.5  Channel State Control Register (address = 0x04) [default = 0x55]
      6. 10.6.6  Channel 1 Through 2 Volume Control Registers (address = 0x05-0x06) [default = 0xCF]
      7. 10.6.7  DC Load Diagnostic Control 1 Register (address = 0x09) [default = 0x00]
      8. 10.6.8  DC Load Diagnostic Control 2 Register (address = 0x0A) [default = 0x11]
      9. 10.6.9  DC Load Diagnostic Report 1 Register (address = 0x0C) [default = 0x00]
      10. 10.6.10 DC Load Diagnostics Report 3 Line Output Register (address = 0x0E) [default = 0x00]
      11. 10.6.11 Channel State Reporting Register (address = 0x0F) [default = 0x55]
      12. 10.6.12 Channel Faults (Overcurrent, DC Detection) Register (address = 0x10) [default = 0x00]
      13. 10.6.13 Global Faults 1 Register (address = 0x11) [default = 0x00]
      14. 10.6.14 Global Faults 2 Register (address = 0x12) [default = 0x00]
      15. 10.6.15 Warnings Register (address = 0x13) [default = 0x20]
      16. 10.6.16 Pin Control Register (address = 0x14) [default = 0x00]
      17. 10.6.17 AC Load Diagnostic Control 1 Register (address = 0x15) [default = 0x00]
      18. 10.6.18 AC Load Diagnostic Control 2 Register (address = 0x16) [default = 0x00]
      19. 10.6.19 AC Load Diagnostic Impedance Report Ch1 through CH2 Registers (address = 0x17-0x18) [default = 0x00]
      20. 10.6.20 AC Load Diagnostic Phase Report High Register (address = 0x1B) [default = 0x00]
      21. 10.6.21 AC Load Diagnostic Phase Report Low Register (address = 0x1C) [default = 0x00]
      22. 10.6.22 AC Load Diagnostic STI Report High Register (address = 0x1D) [default = 0x00]
      23. 10.6.23 AC Load Diagnostic STI Report Low Register (address = 0x1E) [default = 0x00]
      24. 10.6.24 Miscellaneous Control 3 Register (address = 0x21) [default = 0x00]
      25. 10.6.25 Clip Control Register (address = 0x22) [default = 0x01]
      26. 10.6.26 Clip Window Register (address = 0x23) [default = 0x14]
      27. 10.6.27 Clip Warning Register (address = 0x24) [default = 0x00]
      28. 10.6.28 ILIMIT Status Register (address = 0x25) [default = 0x00]
      29. 10.6.29 Miscellaneous Control 4 Register (address = 0x26) [default = 0x40]
  11. 11Application and Implementation
    1. 11.1 Application Information
      1. 11.1.1 AM-Radio Band Avoidance
      2. 11.1.2 Parallel BTL Operation (PBTL)
      3. 11.1.3 Demodulation Filter Design
      4. 11.1.4 Line Driver Applications
    2. 11.2 Typical Application
      1. 11.2.1 BTL Application
        1. 11.2.1.1 Design Requirements
        2. 11.2.1.2 Communication
        3. 11.2.1.3 Detailed Design Procedure
          1. 11.2.1.3.1 Hardware Design
          2. 11.2.1.3.2 Digital Input and the Serial Audio Port
          3. 11.2.1.3.3 Bootstrap Capacitors
          4. 11.2.1.3.4 Output Reconstruction Filter
        4. 11.2.1.4 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
      1. 13.1.1 Electrical Connection of Thermal pad and Heat Sink
      2. 13.1.2 EMI Considerations
      3. 13.1.3 General Guidelines
    2. 13.2 Layout Example
    3. 13.3 Thermal Considerations
  14. 14器件和文档支持
    1. 14.1 文档支持
      1. 14.1.1 相关文档
    2. 14.2 接收文档更新通知
    3. 14.3 社区资源
    4. 14.4 商标
    5. 14.5 静电放电警告
    6. 14.6 Glossary
  15. 15机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Power Supply Recommendations

The TAS6422-Q1 requires three power supplies. The PVDD supply is the high-current supply in the recommended supply range. The VBAT supply is lower current supply that must be in the recommended supply range. The PVDD and VBAT pins can be connected to the same supply if the recommended supply range for VBAT is maintained. The VDD supply is the 3.3 Vdc logic supply and must be maintained in the tolerance as shown in the Recommended Operating Conditions table.