ZHCSCU3C January 2014 – September 2019 TCA5013
PRODUCTION DATA.
After a card interface has been activated in a certain operating mode, it can be deactivated by I2C command or certain interrupt events (see Interrupt Operation). The deactivation sequence is the same regardless of what operating mode the card interface is in.
Figure 7 shows the deactivation sequence initiated by card extraction on the user card interface. It is to be noted that the deactivation sequence starts 100 µs after the transition on PRES. This delay is intended to provide a debounce period that provides unintended deactivation due to any glitch on the PRES pin. As mentioned previously any of the card interfaces may be deactivated due to a supervisor fault, over current fault or over temperature fault. In these cases there is no debounce period and the deactivation sequence is initiated as soon as the internal fault signal is asserted.
Figure 8 shows the deactivation of any card interface initiated by I2C command. If the card interface is activated in asynchronous mode, it can be deactivated by clearing (writing ‘0’) the START_ASYNC bit in the card interface settings register. To deactivate the user card interface when it is activated in synchronous mode, the START_SYNC bit should be cleared (write ‘0’).
MIN | TYP | MAX | UNIT | |
---|---|---|---|---|
tDEAC-TOT | 0.4 | 0.5 | 0.6 | ms |
tDEAC-RST-CLK | 10 | 12 | 15 | µs |
tDEAC-RST-IO | 22 | 24 | 26 | µs |
tDEAC-RST-VCC | 33 | 36 | 39 | µs |