8.4.6.2 IO Rise Time and Fall Time control

The rise time and fall time of the card interface IO pins can be controlled using the IO slew rate settings register (Reg 0x07 for user card and Reg 0x17 for SAMs). The EMV4.3 specification, has strict restrictions on signal perturbations (overshoot and undershoot during transition). Controlling the rise time and fall time of the signals can help to meet these requirements.

Table 6 shows the typical IO rise time for different register settings (based on a typical 30 pF load).

Table 7 shows the typical IO fall time for different register settings (based on a typical 30 pF load). It should also be noted that the output low logic level (V_OL) is affected by the fall time settings. As the fall time becomes slower (higher value of fall time) the V_OL will be higher. Therefore, it is recommended that the fastest fall time setting (smallest fall time value) for IO be used whenever possible. Table 7 also shows which settings are usable for the different V_CC voltages, without risk of violating the V_OL levels required by the EMV4.3 and ISO7816 specifications.