ZHCSRH9E
April 2009 – January 2023
TCA6408A
PRODUCTION DATA
1
特性
2
应用
3
说明
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
I2C Interface Timing Requirements
6.7
Reset Timing Requirements
6.8
Switching Characteristics
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
Voltage Translation
8.3.2
I/O Port
8.3.3
Interrupt Output ( INT)
8.3.4
Reset Input ( RESET)
8.4
Device Functional Modes
8.4.1
Power-On Reset (POR)
8.4.2
Powered-Up
8.5
Programming
8.5.1
I2C Interface
8.5.2
Bus Transactions
8.5.2.1
Writes
8.5.2.2
Reads
8.6
Register Map
8.6.1
Device Address
8.6.2
Control Register and Command Byte
8.6.3
Register Descriptions
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Minimizing ICC When I/O is Used to Control LEDs
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
Power-On Reset Requirements
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
接收文档更新通知
12.2
支持资源
12.3
商标
12.4
静电放电警告
12.5
术语表
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
PW|16
MPDS361A
RSV|16
MPQF205F
RGT|16
MPQF119H
散热焊盘机械数据 (封装 | 引脚)
RGT|16
QFND005T
订购信息
zhcsrh9e_oa
zhcsrh9e_pm
8.2
Functional Block Diagrams
A.
All pin numbers shown are for the PW package.
B.
All I/Os are set to inputs at reset.
Figure 8-1
Logic Diagram (Positive Logic)
A.
On power up or reset, all registers return to default values.
Figure 8-2
Simplified Schematic of P0 to P7
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