ZHCSIH8G October 2010 – November 2018 TCA9406
PRODUCTION DATA.
The TCA9406 architecture (see ) is an auto-direction-sensing based translator that does not require a direction-control signal to control the direction of data flow from A to B or from B to A.
These two bidirectional channels independently determine the direction of data flow without a direction-control signal. Each I/O pin is automatically reconfigured as either an input or an output, which is how this auto-direction feature is realized.
The TCA9406 is part of TI's "Switch" type voltage translator family and employs two key circuits to enable this voltage translation:
1) An N-channel pass-gate transistor topology that ties the A-port to the B-port
and
2) Output one-shot (O.S.) edge-rate accelerator circuitry to detect and accelerate rising edges on the A or B ports
For bidirectional voltage translation, pullup resistors are included on the device for dc current sourcing capability. The VGATE gate bias of the N-channel pass transistor is set at approximately one threshold voltage (VT) above the VCC level of the low-voltage side. Data can flow in either direction without guidance from a control signal.
The O.S. rising-edge rate accelerator circuitry speeds up the output slew rate by monitoring the input edge for transitions, helping maintain the data rate through the device. During a low-to-high signal rising edge, the O.S. circuits turn on the PMOS transistors (T1, T2) to increase the current drive capability of the driver for approximately 30 ns or 95% of the input edge, whichever occurs first. This edge-rate acceleration provides high ac drive by bypassing the internal 10-kΩ pullup resistors during the low-to-high transition to speed up the signal. The output resistance of the driver is decreased to approximately 50 Ω to 70 Ω during this acceleration phase. To minimize dynamic ICC and the possibility of signal contention, the user should wait for the O.S. circuit to turn off before applying a signal in the opposite direction. The worst-case duration is equal to the minimum pulse-width number provided in the Timing Requirements section of this data sheet.