8.5.1 I²C Interface

The TCA9534A has a standard bidirectional I²C interface that is controlled by a master device in order to be configured or read the status of this device. Each slave on the I²C bus has a specific device address to differentiate between other slave devices that are on the same I²C bus. Many slave devices require configuration upon startup to set the behavior of the device. This is typically done when the master accesses internal register maps of the slave, which have unique register addresses. A device can have one or multiple registers where data is stored, written, or read. For more information see the Understanding the I²C Bus application report.

The physical I²C interface consists of the serial clock (SCL) and serial data (SDA) lines. Both SDA and SCL lines must be connected to V_CC through a pull-up resistor. The size of the pull-up resistor is determined by the amount of capacitance on the I²C lines. For further details, see the I²C Pull-up Resistor Calculation application report. Data transfer may be initiated only when the bus is idle. A bus is considered idle if both SDA and SCL lines are high after a STOP condition.

Figure 24 and Figure 25 show the general procedure for a master to access a slave device:

1. If a master wants to send data to a slave:
   • Master-transmitter sends a START condition and addresses the slave-receiver.
   • Master-transmitter sends data to slave-receiver.
   • Master-transmitter terminates the transfer with a STOP condition.
2. If a master wants to receive or read data from a slave:
   • Master-receiver sends a START condition and addresses the slave-transmitter.
   • Master-receiver sends the requested register to read to slave-transmitter.
   • Master-receiver receives data from the slave-transmitter.
   • Master-receiver terminates the transfer with a STOP condition.

Figure 24. Definition of Start and Stop Conditions

Figure 25. Bit Transfer

Table 1 shows the TCA9534A interface definition.