ZHCSCR9C September 2014 – February 2017 TCA9534A
PRODUCTION DATA.
Following the successful Acknowledgment of the address byte, the bus master sends a command byte that is stored in the control register in the TCA9534A (see Figure 27). Two bits of this command byte state the operation (read or write) and the internal register (input, output, polarity inversion or configuration) that is affected. This register can be written or read through the I2C bus. The command byte is sent only during a write transmission.
Once a command byte has been sent, the register that was addressed continues to be accessed by reads until a new command byte has been sent.
Table 3 shows the TCA9534A command byte.
CONTROL REGISTER BITS | COMMAND BYTE (HEX) | REGISTER | PROTOCOL | POWER-UP DEFAULT | |
---|---|---|---|---|---|
B1 | B0 | ||||
0 | 0 | 0×00 | Input Port | Read byte | XXXX XXXX |
0 | 1 | 0×01 | Output Port | Read/write byte | 1111 1111 |
1 | 0 | 0×02 | Polarity Inversion | Read/write byte | 0000 0000 |
1 | 1 | 0×03 | Configuration | Read/write byte | 1111 1111 |