The TCA9539-Q1 is a 16-bit I/O expander for the two-line bidirectional bus (I²C) designed for 1.65 V to 3.6 V, V_CC operation. It provides general-purpose remote I/O expansion for most microcontroller families via the I²C interface, serial clock (SCL) and serial data (SDA).

The TCA9539-Q1 consists of two 8-bit Configuration (input or output selection), Input Port, Output Port, and Polarity Inversion (active-high or active-low operation) registers. At power-on, the I/Os are configured as inputs. The system controller can enable the I/Os as either inputs or outputs by writing to the configuration register bits. The data for each input or output is kept in the corresponding Input or output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system controller.

The system controller can reset the TCA9539-Q1 in the event of a time-out or other improper operation by asserting a low in the RESET input. The power-on reset puts the registers in their default state and initializes the I²C-SMBus state machine. Asserting RESET causes the same reset-initialization to occur without depowering the part.

The TCA9539-Q1 open-drain interrupt ( INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system controller that an input state has changed.

INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I²C bus. Thus, the TCA9539-Q1 can remain a simple target device.

The TCA9539-Q1 is similar to the TCA9555, except for the removal of the internal I/O pull-up resistor, which greatly reduces power consumption when the I/Os are held low, replacement of A2 with RESET, and a different address range. The TCA9539-Q1 is similar to the PCA9539 with lower voltage support (down to V_CC = 1.65 V), and also improved power-on reset circuitry for different application scenarios.

Two hardware pins (A0 and A1) are used to program and vary the fixed I²C address and allow up to four devices to share the same I²C bus or SMBus.