ZHCSEZ2D January   2014  – October 2021 TCA9539-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 RESET Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 I/O Port
      2. 8.3.2 RESET Input
      3. 8.3.3 Interrupt ( INT) Output
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register And Command Byte
      3. 8.6.3 Register Descriptions
        1. 8.6.3.1 Bus Transactions
          1. 8.6.3.1.1 Writes
          2. 8.6.3.1.2 Reads
  9. 9 Power Supply Recommendations
    1. 9.1 Power-On Reset Requirements
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

Figure 5-1 PW Package, 24-Pin TSSOP, Top View
Table 5-1 Pin Functions
PIN I/O DESCRIPTION
NO. NAME
1 INT O Interrupt open-drain output. Connect to VCC through a pull-up resistor
2 A1 I Address input. Connect directly to VCC or ground
3 RESET I Active-low reset input. Connect to VCC through a pull-up resistor if no active connection is used
4 P00 I/O P-port input-output. Push-pull design structure. At power-on, P00 is configured as an input
5 P01 I/O P-port input-output. Push-pull design structure. At power-on, P01 is configured as an input
6 P02 I/O P-port input-output. Push-pull design structure. At power-on, P02 is configured as an input
7 P03 I/O P-port input-output. Push-pull design structure. At power-on, P03 is configured as an input
8 P04 I/O P-port input-output. Push-pull design structure. At power-on, P04 is configured as an input
9 P05 I/O P-port input-output. Push-pull design structure. At power-on, P05 is configured as an input
10 P06 I/O P-port input-output. Push-pull design structure. At power-on, P06 is configured as an input
11 P07 I/O P-port input-output. Push-pull design structure. At power-on, P07 is configured as an input
12 GND — Ground
13 P10 I/O P-port input-output. Push-pull design structure. At power-on, P10 is configured as an input
14 P11 I/O P-port input-output. Push-pull design structure. At power-on, P11 is configured as an input
15 P12 I/O P-port input-output. Push-pull design structure. At power-on, P12 is configured as an input
16 P13 I/O P-port input-output. Push-pull design structure. At power-on, P13 is configured as an input
17 P14 I/O P-port input-output. Push-pull design structure. At power-on, P14 is configured as an input
18 P15 I/O P-port input-output. Push-pull design structure. At power-on, P15 is configured as an input
19 P16 I/O P-port input-output. Push-pull design structure. At power-on, P16 is configured as an input
20 P17 I/O P-port input-output. Push-pull design structure. At power-on, P17 is configured as an input
21 A0 I Address input. Connect directly to VCC or ground
22 SCL I Serial clock bus. Connect to VCC through a pull-up resistor
23 SDA I/O Serial data bus. Connect to VCC through a pull-up resistor
24 VCC — Supply voltage
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