ZHCSDP5E December   2010  – February 2017 TCA9554A

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用范围
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 I/O Port
      2. 8.3.2 Interrupt Output (INT)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register and Command Byte
      3. 8.6.3 Register Descriptions
        1. 8.6.3.1 Bus Transactions
          1. 8.6.3.1.1 Writes
          2. 8.6.3.1.2 Reads
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Calculating Junction Temperature and Power Dissipation
        2. 9.2.1.2 Minimizing ICC When I/Os Control LEDs
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档　
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

PW, DB, DBQ, or DW Package
16-Pin TSSOP, SSOP, SOIC
Top View
TCA9554A po_SCPS196.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
A0 1 I Address input. Connect directly to VCC or ground
A1 2 I Address input. Connect directly to VCC or ground
A2 3 I Address input. Connect directly to VCC or ground
GND 8 — Ground
INT 13 O Interrupt output. Connect to VCC through a pull-up resistor
P0 4 I/O P-port input-output. Push-pull design structure. At power on, P0 is configured as an input
P1 5 I/O P-port input-output. Push-pull design structure. At power on, P1 is configured as an input
P2 6 I/O P-port input-output. Push-pull design structure. At power on, P2 is configured as an input
P3 7 I/O P-port input-output. Push-pull design structure. At power on, P3 is configured as an input
P4 9 I/O P-port input-output. Push-pull design structure. At power on, P4 is configured as an input
P5 10 I/O P-port input-output. Push-pull design structure. At power on, P5 is configured as an input
P6 11 I/O P-port input-output. Push-pull design structure. At power on, P6 is configured as an input
P7 12 I/O P-port input-output. Push-pull design structure. At power on, P7 is configured as an input
SCL 14 I Serial clock bus. Connect to VCC through a pull-up resistor
SDA 15 I/O Serial data bus. Connect to VCC through a pull-up resistor
VCC 16 — Supply voltage
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