ZHCSJJ3E
July 2009 – April 2019
TCA9555
PRODUCTION DATA.
1
特性
2
应用
3
说明
Device Images
简化原理图
4
修订历史记录
5
说明 (续)
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
I2C Interface Timing Requirements
7.7
Switching Characteristics
7.8
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
5-V Tolerant I/O Ports
9.3.2
Hardware Address Pins
9.3.3
Interrupt (INT) Output
9.4
Device Functional Modes
9.4.1
Power-On Reset (POR)
9.4.2
Powered-Up
9.5
Programming
9.5.1
I/O Port
9.5.2
I2C Interface
9.5.2.1
Bus Transactions
9.5.2.1.1
Writes
9.5.2.1.2
Reads
9.5.3
Device Address
9.5.4
Control Register and Command Byte
9.6
Register Maps
9.6.1
Register Descriptions
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Calculating Junction Temperature and Power Dissipation
10.2.2.2
Minimizing ICC When I/O Is Used to Control LED
10.2.2.3
Pull-Up Resistor Calculation
10.2.3
Application Curves
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
器件和文档支持
13.1
文档支持
13.1.1
相关文档
13.2
接收文档更新通知
13.3
社区资源
13.4
商标
13.5
静电放电警告
13.6
术语表
14
机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
PW|24
MPDS363A
RGE|24
MPQF124G
DB|24
MPDS509
RTW|24
MPQF167C
散热焊盘机械数据 (封装 | 引脚)
RGE|24
QFND008AA
RTW|24
QFND062N
订购信息
zhcsjj3e_oa
zhcsjj3e_pm
9.2
Functional Block Diagram
Pin numbers shown are for the PW package.
All I/Os are set to inputs at reset.
Figure 22.
Logic Diagram (Positive Logic)
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