ZHCSJJ3E July 2009 – April 2019 TCA9555
PRODUCTION DATA.
To write on the I2C bus, the master sends a START condition on the bus with the address of the slave, as well as the last bit (the R/W bit) set to 0, which signifies a write. After the slave sends the acknowledge bit, the master then sends the register address of the register to which it wishes to write. The slave acknowledges again, letting the master know it is ready. After this, the master starts sending the register data to the slave until the master has sent all the data necessary (which is sometimes only a single byte), and the master terminates the transmission with a STOP condition.
See the Control Register and Command Byte section to see list of the TCA9555's internal registers and a description of each one.
Figure 26 to Figure 28 show examples of writing a single byte to a slave register.
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