A typical application is shown in Figure 7-1. In this example, the system controller is running on a 0.9V I²C bus, and the target is connected to a 2.5V bus. Both buses are running at 400kHz. Decoupling capacitors are required but are not shown in Figure 7-6 for simplicity.

The TCA9617A is 5V tolerant so no additional circuits are required to translate between 0.8V to 5.5V bus voltages and 2.7V to 5.5V bus voltages.

When the A side of the TCA9617A is pulled low by a driver on the I²C bus, a comparator detects the falling edge when the signal level goes below 30% of V_CCA and cause the internal driver on the B side to turn on. The B-side is first pull down to 0V and then settle to 0.5V. When the B side of the TCA9617A falls below 0.4V, the TCA9617A detects the falling edge, turn on the internal driver on the A side and pull the A-side pin down to ground. To illustrate what can be seen for an A to B transition refer to Figure 7-3, and for a B to A transition see Figure 7-2.

On the B-side bus of the TCA9617A, the clock and data lines have a positive offset from ground equal to the V_OL of the TCA9617A. After the eighth clock pulse, the data line is pulled to the V_OL of the target device, which is close to ground in this example. At the end of the acknowledge, the level rises only to the low level set by the driver of the TCA9617A for a short delay (approximately 0.5V), while the A-side bus rises above 30% of V_CCA and then continues high.

Although the TCA9617A has a single application, the device can exist in multiple configurations. Figure 7-1 shows the standard configuration for the TCA9617A. Multiple TCA9617As can be connected either in star configuration (Figure 7-4) or in series configuration (Figure 7-5). The design requirements , detailed design procedure, and application curves in Section 7.2.1 are valid for all three configurations.