Figure 6-2 depicts the offset voltage on the B side of the device. As shown in Figure 6-2 the target releases and the B-side rises, and rises to 0.5V and stays there until the A-side rises above 30% of V_CCA. This effect can cause the low level signal to have a pedestal. Once the voltage on the A-side crosses 30% of V_CCA, the B-side begins to rise to V_CCB.

Due to nature of the B-side pedestal and the static offset voltage, there is a slight overshoot as the B-side rises from being externally driven low to the 0.5V offset. The TCA9617A is designed to control this behavior provided the system is designed with rise times greater than 20ns. Therefore, care must be taken to limit the pullup strength when devices with rise time accelerators are present on the B side. Excessive overshoot on the B-side pedestal can cause devices with rise time accelerators to trip prematurely if the accelerator thresholds are below 30% of V_CCB.