ZHCSG42B March   2017  – February 2020 TCA9803

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
  4. 4 修订历史记录
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Integrated Current Source
      2. 9.3.2 Ultra-Low Power Consumption
      3. 9.3.3 No Static-Voltage Offset
      4. 9.3.4 Active-High Repeater Enable Input
      5. 9.3.5 Powered Off High Impedance I2C Bus Pins on A-Side
      6. 9.3.6 Powered-Off Back-Power Protection for I2C Bus Pins
      7. 9.3.7 Clock Stretching and Multiple Master Arbitration Support
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device Operation Considerations
        1. 9.4.1.1 B-Side Input Low (VIL/IILC/RILC)
          1. 9.4.1.1.1 VILC & IILC
          2. 9.4.1.1.2 RILC
        2. 9.4.1.2 Input and Output Leakage Current (IEXT-I/IEXT-O)
          1. 9.4.1.2.1 IEXT-I
          2. 9.4.1.2.2 IEXT-O
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Device Selection Guide
      2. 10.1.2 Special Considerations for the B-side
        1. 10.1.2.1 FET or Pass-Gate Translators
        2. 10.1.2.2 Buffered Translators/Level-shifters
    2. 10.2 Typical Application
      1. 10.2.1 Single Device
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Buffering Without Level-Shifting
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curve
      3. 10.2.3 Parallel Device Use Case
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curves
      4. 10.2.4 Series Device Use Case
        1. 10.2.4.1 Design Requirements
        2. 10.2.4.2 Detailed Design Procedure
        3. 10.2.4.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 文档支持
    2. 13.2 接收文档更新通知
    3. 13.3 支持资源
    4. 13.4 商标
    5. 13.5 静电放电警告
    6. 13.6 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

10.2.2.2 Detailed Design Procedure

Selecting the pull-up resistor required for the A-side is well documented already, see the I2C Bus Pullup Resistor Calculation application report. The rest of this section deals only with selection of a device based on the B-side design requirements.

Selection process of each device is identical to the procedure described in the Device Selection Guide section, except that it must be done for each individual TCA980x. This section jumps straight to the selection graphs to show the selection process. See the Detailed Design Procedure section for single device for detailed information.

As shown in Figure 30, the shaded region is the appropriate region based on design requirements listed in Table 7. Any line that touches this shaded region is able to meet the design requirements. In this example, the TCA9803, TCA9802, and TCA9801 are able to satisfy the design requirements, since they all touch the shaded region. The TCA9800 falls below the shaded region.

Based on the selection graph shown above, the TCA9801 is selected, since it is the lowest-power device which touches the shaded region (red trace). The TCA9803 or the TCA9802 may also be used without any consequences.
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