An interrupt is generated by any rising or falling edge of the port inputs in the input mode provided the interrupt feature is unmasked. After time t_iv, the INT signal is valid. Resetting the interrupt circuit is achieved when data on the port is changed back to the original setting or when data is read from the port that generated the interrupt. Resetting occurs in the read mode at the acknowledge (ACK) bit after the rising edge of the SCL signal. Interrupts that occur during the ACK clock pulse can be lost (or be very short) due to the resetting of the interrupt during this pulse. Each change of the I/Os after resetting is detected and is transmitted as INT.

Reading from or writing to another device does not affect the interrupt circuit, and a pin configured as an output cannot cause an interrupt. Changing an I/O from an output to an input may cause a false interrupt to occur if the state of the pin does not match the contents of the Input Port register.

The INT output has an open-drain structure and requires an external pull-up resistor to V_CC.