ZHCSN78E january 2021 – march 2023 TCAN1043A-Q1
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 ESD Ratings - IEC Specifications
- 6.4 Recommended Operating Conditions
- 6.5 Thermal Information
- 6.6 Power Dissipation Ratings
- 6.7 Power Supply Characteristics
- 6.8 Electrical Characteristics
- 6.9 Timing Requirements
- 6.10 Switching Characteristics
- 6.11 Typical Characteristics
- 7 Parameter Measurement Information
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Supply Pins
- 8.3.2 Digital Inputs and Outputs
- 8.3.3 GND
- 8.3.4 INH Pin
- 8.3.5 WAKE Pin
- 8.3.6 CAN Bus Pins
- 8.3.7
Faults
- 8.3.7.1
Internal and External Fault Indicators
- 8.3.7.1.1 Power-Up (PWRON Flag)
- 8.3.7.1.2 Wake-Up Request (WAKERQ Flag)
- 8.3.7.1.3 Undervoltage Faults
- 8.3.7.1.4 CAN Bus Fault (CBF Flag)
- 8.3.7.1.5 TXD Clamped Low (TXDCLP Flag)
- 8.3.7.1.6 TXD Dominant State Timeout (TXDDTO Flag)
- 8.3.7.1.7 TXD Shorted to RXD Fault (TXDRXD Flag)
- 8.3.7.1.8 CAN Bus Dominant Fault (CANDOM Flag)
- 8.3.7.1
Internal and External Fault Indicators
- 8.3.8 Local Faults
- 8.4 Device Functional Modes
- 9 Application Information Disclaimer
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
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8.4 Device Functional Modes
The TCAN1043A-Q1 has six operating modes: normal, standby, silent, go-to-sleep, sleep, and off mode. Operating mode selection is controlled using the nSTB pin and EN pin in conjunction with supply conditions, temperature conditions, and wake events.
Figure 8-4 TCAN1043A-Q1 State
Machine- The enable pin can be in a logical high or low state while in sleep mode but since it has an internal pull-down, the lowest possible power consumption occurs when the pin is left either floating or pulled low externally.
- At power-up, the undervoltage timers for VCC and VIO are disabled, allowing for longer period for VCC and VIO supplies to power up (up to tINACTIVE). VCC or VIO need to be above UVCC(R) and UVIO(R) respectively to enable their respective tUV timers. The VCC undervoltage timer starts when VCC falls below UVCC(F), while VIO undervoltage timer starts when VIO falls below UVIO(F). When either of these timers exceed tUV, the device enters sleep mode.
- The Sleep Wake Error (SWE) timer starts as soon as the device enters Standby mode. The timer halts and resets as soon as the device enters Normal mode. If the device enters Silent mode from Standby mode, the SWE timer does not halt and the device needs to be transitioned to Normal mode before the SWE timer expires. If the device enters Silent mode from Normal mode, the SWE timer will not be active in Silent mode.
- When the Sleep mode is entered from Go-To-Sleep Mode or from a UVCC or UVIO event, a low-to-high transition on nSTB is required to move the device into Normal or Silent mode. If EN is high during the rising edge on nSTB, the device moves to Normal mode. If EN is low during the rising edge on nSTB, the device moves to Silent mode. VIO must be above UVIO(R) in order to leave Sleep mode using the EN and nSTB signals.
- When Sleep mode is entered due to an SWE timer timeout (>tINACTIVE), there is an extra requirement to exit Sleep mode and transition into Normal or Silent mode directly using the EN and nSTB signals. To move to Normal mode, the nSTB pin must be high and a low-to-high transition must occur on EN. To move to Silent mode, the nSTB pin must be high and a high-to-low transition must occur on EN. If the device entered Sleep mode while the nSTB was already high, there must be a transition on the EN pin while nSTB is low prior to the sequence described above. See Figure 8-5 for more information. VIO must be above UVIO(R) to leave Sleep mode by using the EN and nSTB signals.
- nSTB must remain low for a minimum of tMODE1 after the edge on EN. Once this tMODE1 has elapsed, nSTB may be driven high. The following edge on EN will cause the device to exit Sleep mode. The final edge on EN does not have any minimum delay from the rising edge of nSTB. The enable pin can be in a logical high or low state while in sleep mode, but since it has an internal pull-down, the lowest possible power consumption occurs when the pin is left either floating or pulled low externally.
Table 8-4 TCAN1043A-Q1 Mode
Overview
| MODE | VCC and VIO | VSUP | EN | nSTB | WAKERQ FLAG | DRIVER | RECEIVER | RXD | INH |
|---|---|---|---|---|---|---|---|---|---|
| Normal | > UVCC and > UVIO | > UVSUP | High | High | X | Enabled | Enabled | Mirrors bus state | On |
| Silent | > UVCC and > UVIO | > UVSUP | Low | High | X | Disabled | Enabled | Mirrors bus state | On |
| Standby | > UVCC and > UVIO | > UVSUP | High | Low | Set | Disabled | Low power bus monitor enabled | Low signals wake-up | On |
| > UVCC and > UVIO | > UVSUP | Low | Low | X | Disabled | Low power bus monitor enabled | Low signals wake-up | On | |
| > UVCC and < UVIO | > UVSUP | Low | Low | X | Disabled | Low power bus monitor enabled | High impedance | On | |
| Go-to-sleep(1) | > UVCC and > UVIO | > UVSUP | High | Low | Cleared | Disabled | Low power bus monitor enabled | High or high impedance (no VIO) | On(2) |
| Sleep(3) | > UVCC and > UVIO | > UVSUP | High | Low | Cleared | Disabled | Low power bus monitor enabled | High or high impedance (no VIO) | High Impedance |
| < UVCC or <UVIO | > UVSUP | X | X | X | Disabled | Low power bus monitor enabled | High or high impedance (no VIO) | High impedance | |
| Protected | X | < UVSUP | X | X | X | Disabled | Disabled | High impedance | High impedance |
(1) Go-to-sleep: Transitional mode for EN = H, nSTB = L until
tGOTOSLEEP timer has expired.
(2) The INH pin transitions to high impedance after the
tGOTOSLEEP timer has expired.
(3) Mode change from go-to-sleep mode to sleep mode once
tGOTOSLEEP timer has expired.