The 4-bit WD question, WD_QA_QUESTION[3:0], is generated by 4-bit Markov chain process. A Markov chain is a stochastic process with Markov property, which means that state changes are probabilistic, and the future state depends only on the current state. The valid and complete WD answer sequence for each WD Q&A mode is as follows:

• In WD Q&A multi-answer mode:
  1. Three correct SPI WD answers are received during RESPONSE WINDOW 1.
  2. One correct SPI WD answer is received during RESPONSE WINDOW 2.
  3. In addition to the previously listed timing, the sequence of four responses shall be correct.

The WD question value is latched in the WD_QUESTION bits of the WD_QA_QUESTION register and can be read out at any time.

The Markov chain process is clocked by the 4-bit Question counter at the transition from 1111b to 0000b. This includes the condition of a correct answer (correct answer value and correct timing response). The logic combination of the 4-bit questions WD_QA_QUESTION [3:0] generation is given in Figure 8-32. The question counter is reset to default value of 0000b and the Markov chain is re-initialized to programmed register value when a watchdog fail puts the device into standby mode.

A.

• Register 8'h2D[3:0] WD_QA_POLY_SEED maps as bit 3 = X1, bit 2 = X2. bit 1 = X3 and bit 0 = X4.
• If the current y value is 0000b, the next y value is 0001b. The next watchdog question generation process starts from that value. Any changes to WD_QA_CONFIG register in Standby mode will re-initialize the Markov chain to the current register value. The question counter is not affected.

Figure 8-32 Watchdog Question Generation