This pin is high impedance until the SPI output is enabled via nCS. Once the SPI is enabled by a low on nCS, the SDO is immediately driven high or low showing the global interrupt register 8'h50, bit 7. The Global Interrupt register, INT_GLOBAL, is the first byte to be shifted out. The SDO pin provides data out from the device to the processor. For a write command this is the only data that is provided on the SDO pin. For a read command the one to three bytes of data from successive address is provided on the SDO line. Figure 8-43 and Figure 8-44 shows examples of a single address read and of a three sequential address read using the 32-bit burst read. The 32-bit burst read shows the global interrupt register followed by the three requested data bytes.

Figure 8-43 SPI Read

Figure 8-44 32-bit SPI Burst Read