米6体育平台手机版

ZHCSH93 December 2017 TCAN4420

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6.8 Timing Requirements

			MIN	NOM	MAX	UNIT
Switching Characteristics
t_pHR	Propagation delay time, high TXD to Driver Recessive	See Figure 9, Typical Conditions for DS: R_L = 60 Ω, C_L = 100 pF, R_CM = open		50		ns
t_pLD	Propagation delay time, low TXD to Driver Dominant			40
t_sk(p)	Pulse skew (\|t_pHR - t_pLD\|)			10
t_R	Differential output signal rise time			25
t_F	Differential output signal fall time			25
t_{TXD_DTO}	Dominant time out⁽¹⁾	See Figure 13, R_L = 60 Ω, C_L = open	1.2		4	ms
t_pRH	Propagation delay time, bus recessive input to high RXD_INT output	See Figure 10 C_L(RXD) = 15 pF Typical Conditions for DS: CANL = 1.5 V, CANH = 3.5 V		50		ns
t_pDL	Propagation delay time, bus dominant input to RXD low output			50
t_R	Differential output signal rise time			8
t_F	Differential output signal fall time			8
Device Switching Characteristics
t_(LOOP1)	Total loop delay, driver input (TXD) to receiver output (RXD), recessive to dominant⁽²⁾	See Figure 10 Typical Conditions: R_L = 60 Ω, C_L = 100 pF, C_L(RXD)= 15 pF			150	ns
t_(LOOP2)	Total loop delay, driver input (TXD) to receiver output (RXD), dominant to receissive⁽²⁾	See Figure 10 Typical Conditions: R_L = 60 Ω, C_L = 100 pF, C_L(RXD)= 15 pF			150
t_MODE	Mode change time from normal configuration to reverse				300	µs
t_{UV_RE-ENABLE}	Re-enable time after UV event	See Figure 10. Time for device to return to normal operation from UV_VCC and UV_VIO under voltage event			300	µs

(1) The TXD dominant time out (t_{TXD_DTO}) disables the driver of the transceiver once the TXD has been dominant longer than t_{TXD_DTO}, which releases the bus lines to recessive, preventing a local failure from locking the bus dominant. The driver may only transmit dominant again after TXD has been returned HIGH (recessive). While this protects the bus from local faults, locking the bus dominant, it limits the minimum data rate possible. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the worst case, where five successive dominant bits are followed immediately by an error frame. This, along with the t_{TXD_DTO} minimum, limits the minimum bit rate. The minimum bit rate may be calculated by: Minimum Bit Rate = 11/ t_{TXD_DTO} = 11 bits / 1.2 ms = 9.2 kbps.

(2) Time span from signal edge on TXD input to next signal edge with same polarity on RXD output, the maximum of delay of both signal edges is to be considered.