11.1 Layout Guidelines

Place the protection and filtering circuitry as close to the bus connector, J1, to prevent transients, ESD and noise from propagating onto the board. The layout example provides information on components around the device itself. Transient voltage suppression (TVS) device can be added for extra protection, shown as D1. The production solution can be either a bi-directional TVS diode or a varistor with ratings matching the application requirements. This example also shows optional bus filter capacitors C10 and C11. A series common mode choke (CMC) is placed on the CANH and CANL lines between TCAN4551-Q1 and connector J1.

Design the bus protection components in the direction of the signal path. Do not force the transient current to divert from the signal path to reach the protection device. Use supply and ground planes to provide low inductance.

Use at least two vias for supply and ground connections of bypass capacitors and protection devices to minimize trace and via inductance.

• Bus termination: this layout example shows split termination. This is where the termination is split into two resistors, R5 and R6, with the center or split tap of the termination connected to ground via capacitor C9. Split termination provides common mode filtering for the bus. When bus termination is placed on the board instead of directly on the bus, additional care must be taken to ensure the terminating node is not removed from the bus thus also removing the termination.
• As terminal 8 (nINT) and 9 (GPO2) are open drain an external resistor to V_IO is required. These can have a value between 2 kΩ and 10 kΩ.
• Terminal 12 (WAKE) is a bi-directional triggered wake up input that is usually connected to an external switch. It should be configured as shown with a 10 nF (C8) to GND where R2 is 33 kΩ and R3 is 3 kΩ.
• Terminal 15 (INH) can be left floating if not used but a 100 kΩ pull-down resistor can be used to discharge the INH to a sufficient level when the INH output is high-Z.