The TDES954 provides dedicated PASS and LOCK outputs for monitoring status as well as through the DEVICE_STS register (address 0x04).The source of the deserializer LOCK and PASS signals for pin monitoring and interrupt operation is also controlled by the LOCK_SEL and PASS_SEL fields in the RX_PORT_CTL register. The source of the LOCK and PASS can be allocated to either of the following system use cases: 00: Port 0 Receiver, 01: Port 1 Receiver, 10: Any Enabled Receiver Port (Logical OR), and 11: All Enabled Receiver Ports (logical AND). At start-up, the deserializer will synchronize with the input signal provided by the serializer and assert the LOCK indication once stable. The lock detect circuit includes an option to check for link bit errors as part of the lock detection and determine if LOCK is lost. The Receive Port Lock status is available for each port through the RX_PORT_STS1 register 0x4D. The LOCK status may also be used to enable video forwarding and other options. I2C communication across the V³Link should be attempted only during LOCK condition.

In RAW12 HF mode, the LOCK pin is only high if there is a link with a serializer that has an active PCLK input. LOCK is low if there is a serializer connected and there is a link established using the internal oscillator of the serializer. Therefore, when using this mode, it is preferred to use the port-specific LOCK_STS register (0x4D[0]), which is high when linked to a serializer with internal oscillator. This LOCK_STS signal can also be an output to a GPIO pin for monitoring in real time. Once LOCK_STS is high for a specific port, remote I2C is available to that serializer. In RAW 10-bit mode, the LOCK pin is high when there is a link with a serializer regardless of whether there is an active PCLK input. The port-specific LOCK_STS register is also valid in either of these modes.

If the deserializer loses LOCK, the receiver will reset and perform the LOCK algorithm again to reacquire the serial data stream sent by the serializer. The receive port will truncate video frames containing errors and resume forwarding the video when LOCK is re-established.

The Receive port will indicate Pass status once specific conditions are met, including a number of valid frames received. Valid frames may include requiring no link bit errors and consistent frame size including video line length or number of video lines. The receive port may be programmed to truncate video frames containing errors and prevent the forwarding of video until the Pass conditions are met.