In cases with multiple input sources, synchronized forwarding offers synchronization of all incoming data stored within the buffer. If packets arrive within a certain window, the forwarding control may be programmed to attempt to synchronize the video buffer data. In this mode, it attempts to send each channel synchronization packets in order (VC0, VC1) as well as sending packet data in the same order. In the following sections, Sensor A (SA) and Sensor B (SB) refer to the sensors connected at V³Link RX port 0, and RX port 1, respectively. The following describe only the 2-port operation, but single port configuration also can be applied.

The forwarding engine for the CSI-2 Transmitter can be configured to synchronize both video sources.

Requirements:

• Video arriving at input ports should be synchronized within approximately one video line period
• All enabled ports should have valid, synchronized video
• Each port must have identical video parameters, including number and size of video lines, presence of synchronization packets, and so forth.

The forwarding engine attempts to send the video synchronized. If synchronization fails, the CSI-2 transmitter stops forwarding packets and attempt to restart sending synchronized video at the next FrameStart indication. Packets are discarded as long as the forwarding engine is unable to send the synchronized video.

Status is provided to indicate when the forwarding engine is synchronized. In addition, a flag is used to indicate that synchronization has been lost (status is cleared on a read).

Three options are available for Synchronized forwarding:

• Basic Synchronized forwarding
• Line-Interleave forwarding
• Line-Concatenated forwarding

Synchronized forwarding modes are selected by setting the CSIx_SYNC_FWD controls in the FWD_CTL2 register. To enable synchronized forwarding the following order of operations is recommended:

1. Disable Best-effort forwarding by clearing the CSIx_RR_FWD bits in the FWD_CTL2 register
2. Enable forwarding per Receive port by clearing the FWD_PORTx_DIS bits in the FWD_CTL1 register
3. Enable Synchronized forwarding in the FWD_CTL2 register