ZHCSNJ8A April 2021 – September 2023 TDES960
PRODUCTION DATA
The TDES960 can support up to four simultaneous inputs to Rx ports 0 - 4. The Receiver port control register RX_PORT_CTL 0x0C allows for disabling any Rx inputs when not in use. These bits can only be written by a local I2C controller at the deserializer side of the V3Link.
Each V3Link Receive port has a unique set of registers that provides control and status corresponding to Rx ports 0 - 4. Control of the V3Link port registers is assigned by the V3LINK_PORT_SEL register, which sets the page controls for reading or writing individual ports unique registers. For each of the V3Link Receive Ports, the V3LINK_PORT_SEL 0x4C register defaults to selecting that port’s registers as detailed in register description.
As an alternative to paging to access V3Link Receive unique port registers, separate I2C addresses may be enabled to allow direct access to the port-specific registers. The Port I2C address registers 0xF8 - 0xFB allow programming a separate 7-bit I2C address to allow access to unique, port-specific registers without paging. I2C commands to these assigned I2C addresses are also allowed access to all shared registers.