The TDP158 has the ability to perform as a DisplayPort redriver under the right conditions. The TDP158 is put into this mode by setting reg09h[5] to 1. The device is now programmable through I²C only. As the transmitter is a DC coupled transmitter supporting TMDS some external circuits are required to level shift the signal to an AC-coupled DisplayPort signal, see Figure 8-6. Note that the AUX lines bypass the TDP158. To set the device up correctly during link training, the TDP158 must be programmed using I²C. When this bit is set, the TDP158 does the following:

• Ignore SWAP function
• Ignore SIG_EN function
• Enable all four lanes and set to support 5.4Gbps data rate
• Sets V_OD swing to the lowest level based on a 6 kΩ VSADJ resistor value
• Sets pre-emphasis to 0dB
• Defaults to global lane control
• Can be set to independent lane control by setting P0_Reg09[6] to a 1. This should be done after implementing DP mode. Individual Lane control starts on P0_Reg30 through P0_Reg34 and also P0_Reg4E and 4F

For the system implementer to configure the TDP158 output to the properly requested levels during link training, the following registers are used.

• Reg0Ch[7:5] is a global V_OD swing control for all four lanes; Table 7-5 provides more information
• Reg0Ch[1:0] is a global pre-emphasis control for all four lanes; Table 7-5 provides more information. This register works with Reg30h[7:6]
• Reg0D[6:3] is a global EQ control for all four lanes
• Reg30h[7:6] is to let the TDP158 know what the data rate is. This is used for the delay component for pre-emphasis signal.
• Reg30h[5:2] is used to turn on or off individual lanes

Power down states while in DP-Mode are implemented the same as if in normal operation. See Section 5.7 for the outputs based upon the VSADJ 6kΩ VSADJ resistor.