11.1 Layout Guidelines

Figure 80 shows the THS4521EVM schematic. PCB layers 1 through 4 are shown in Figure 93; Table 9 lists the bill of materials for the THS4521EVM as supplied from TI. It is recommended to follow the layout of the external components near to the amplifier, ground plane construction, and power routing as closely as possible. Follow these general guidelines:

• Signal routing should be direct and as short as possible into and out of the amplifier circuit.
• The feedback path should be short and direct.
• Ground or power planes should be removed from directly under the amplifier input and output pins.
• An output resistor is recommended in each output lead, placed as near to the output pins as possible.
• Two 0.1-μF power-supply decoupling capacitors should be placed as near to the power-supply pins as possible.
• Two 10-μF power-supply decoupling capacitors should be placed within 1 inch of the device and can be shared among multiple analog devices.
• A 0.22-μF capacitor should be placed between the V_OCM input pin and ground near to the pin. This capacitor limits noise coupled into the pin.
• The PD pin uses TTL logic levels; a bypass capacitor is not necessary if actively driven, but can be used for robustness in noisy environments whether driven or not.
• If input termination resistors R₁₀ and R₁₁ are used, a single point connection to ground on L2 is recommended.

11.2 Layout Example

Figure 93. THS4521EVM: Layer 1 to Layer 4 Images