ZHCSFB6D April 2016 – June 2021 THS4551
PRODUCTION DATA
The THS4551 provides a simple interface to a wide variety of precision SAR and delta-sigma (ΔΣ) ADCs. To deliver the exceptional distortion at the output pins, considerably wider bandwidth than what is typically required in the signal path to the ADC inputs is provided by the THS4551. This wide amplifier bandwidth provides the low broadband, closed-loop output impedance to supply the sampling glitches and to recover quickly for the best SFDR. A particularly challenging task is to drive the high-frequency modulator sample rates for a precision ΔΣ converter where the modulator frequency can be far higher than the final output data rate. Figure 10-2 shows a tested example circuit using the THS4551 in a 500-kHz, active multiple feedback (MFB) filter driving the 24-bit ADS127L01. This filter is designed for FO = 500 kHz and Q = 0.63 to give a linear phase response with the –3-dB frequency at 443 kHz. This example circuit is available as a TINA-TI™ simulation file.
This 3-V supply example provides a low-power interface to the very low-power ADC. This circuit is available on the ADS127L01EVM board.
The 5-Ω resistors inside the loop at the output pins and the 1-nF differential capacitor across the FDA input pins are not part of the filter design. These elements function to improve the loop-phase margin with minimal interaction with the active filter operation To observe the loop gain and phase margin, use the SBOC461 TINA-TI™ simulation file. Tested performance with the ADS127L01 at a 4-kHz input shows the exceptional THD and SNR of –114 dBc and 106 dB, respectively. Figure 10-3 uses the ADS127L01 at a modulator frequency of 16 MHz.