9.4.2 Device Functional Modes for THVD1451

For this device, the driver and receiver are fully enabled, thus the differential outputs Y and Z follow the logic states at data input D at all times. A logic high at D causes Y to turn high and Z to turn low. In this case, the differential output voltage defined as V_OD = V_Y – V_Z is positive. When D is low, the output states reverse: Z turns high, Y becomes low, and VOD is negative. The D pin has an internal pull-up resistor to V_CC, thus, when left open while the driver is enabled, output Y turns high and Z turns low.

When the differential input voltage defined as V_ID = V_A – V_B is higher than the positive input threshold, V_TH+, the receiver output, R, turns high. When V_ID is less than the negative input threshold, V_TH–, the receiver output, R, turns low. If V_ID is between V_TH+ and V_TH– the output is indeterminate. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted to one another (short-circuit), or the bus is not actively driven (idle bus).