9.4.3 Device Functional Modes for THVD1452

When the driver enable pin, DE, is logic high, the differential outputs Y and Z follow the logic states at data input D. A logic high at D causes Y to turn high and Z to turn low. In this case the differential output voltage defined as V_OD = V_Y – V_Z is positive. When D is low, the output states reverse: Z turns high, Y becomes low, and V_OD is negative.

When DE is low, both outputs turn high-impedance. In this condition the logic state at D is irrelevant. The DE pin has an internal pull-down resistor to ground, thus when left open the driver is disabled (high-impedance) by default. The D pin has an internal pull-up resistor to V_CC, thus, when left open while the driver is enabled, output Y turns high and Z turns low.

When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage defined as V_ID = V_A – V_B is higher than the positive input threshold, V_TH+, the receiver output, R, turns high. When V_ID is lower than the negative input threshold, V_TH-, the receiver output, R, turns low. If V_ID is between V_TH+ and V_TH- the output is indeterminate.

When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of V_ID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted to one another (short-circuit), or the bus is not actively driven (idle bus).