ZHCSQ45A january 2023 – july 2023 THVD1454
PRODUCTION DATA
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
R | 1 | Digital output | Logic output RS-485 data |
RE | 2 | Digital input | Receiver enable/disable. Internal pull-up. Receiver disabled by default |
DE | 3 | Digital input | Driver enable/disable. Internal pull-down. Driver disabled by default |
D | 4 | Digital input | Logic input RS485 data. Internal pull-up. Drives the bus high by default if driver is enabled |
TERM | 5 | Digital input | 120 Ω on-chip termination control for A/B pins. Internal pull-down. Termination across A/B is disabled by default |
GND | 6 | GND | Ground |
SLR | 7 | Digital input | Slew rate control. Internal pull-down, default 20 Mbps operation. Logic high SLR enables slow speed (500 kbps) |
A | 8 | Bus input/output | RS-485 bus pin. This pin is non-inverting driver output or non-inverting receiver input |
B | 9 | Bus input/output | RS-485 bus pin. This pin is inverting driver output or inverting receiver input |
VCC | 10 | Power | 3 V to 5.5 V supply |
Thermal Pad | -- | Connect to GND for optimal thermal and electrical performance |