ZHCSSR6B August 2023 – April 2024 THVD4431
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| tLB_RS232_rising | Delay from Logic input rising edge to logic output rising edge in RS-232 Loopback mode | MODE2 = X, MODE1, MODE0 = GND; SLR = GND, Delay from 50% of L3/L4/L6 rising edge to 50% L2/L1/L5, L7, L8 rising edge, SHDN = Vio, TERM_TX and TERM_RX float, Load capacitance on output buffers = 15 pF, RL on all 3 driver outputs = 3kΩ, -40 ℃ ≤ TA ≤ 85 ℃ | 410 | 920 | ns | ||
| MODE2 = X, MODE1, MODE0 = GND; SLR = Vio, Delay from 50% of L3/L4/L6 rising edge to 50% L2/L1/L5, L7, L8 rising edge, SHDN = Vio, TERM_TX and TERM_RX float, Load capacitance on output buffers = 15 pF, RL on all 3 driver outputs = 3kΩ, -40 ℃ ≤ TA ≤ 85 ℃ | 640 | 1100 | ns | ||||
| tLB_RS232_falling | Delay from Logic input falling edge to logic output falling edge in RS-232 Loopback mode | MODE2 = X, MODE1, MODE0 = GND; SLR = GND, Delay from 50% of L3/L4/L6 falling edge to 50% L2/L1/L5, L7, L8 falling edge, SHDN = Vio, TERM_TX and TERM_RX float, Load capacitance on output buffers = 15 pF, RL on all 3 driver outputs = 3kΩ, -40 ℃ ≤ TA ≤ 85 ℃ | 570 | 760 | ns | ||
| MODE2 = X, MODE1, MODE0 = GND; SLR = Vio, Delay from 50% of L3/L4/L6 falling edge to 50% L2/L1/L5, L7, L8 falling edge, SHDN = Vio, TERM_TX and TERM_RX float, Load capacitance on output buffers = 15 pF, RL on all 3 driver outputs = 3kΩ, -40 ℃ ≤ TA ≤ 85 ℃ | 600 | 1460 | ns | ||||
| tSKEW_RS232_LB | Pulse skew from logic input to logic output in RS232 loopback mode | |tLB_RS232_rising - tLB_RS232_falling|, SLR = Vio, -40 ℃ ≤ TA ≤ 85 ℃ | 100 | 860 | ns | ||
| |tLB_RS232_rising - tLB_RS232_falling|, SLR = GND, -40 ℃ ≤ TA ≤ 85 ℃ | 70 | 250 | ns | ||||
| tLB_RS485_rising | Delay from Logic input rising edge to logic output rising edge in RS-485 Loopback mode | MODE2 = MODE1 = MODE0 = Vio; SLR = Vio, Delay from 50% of L3 rising edge to 50% L2 rising edge, SHDN = Vio, TERM_TX and TERM_RX float, Load cap on L2 = 15 pF, Load on Driver output terminals (R2-R1) = 54 Ω | 1060 | 1770 | ns | ||
| tLB_RS485_falling | Delay from Logic input falling edge to logic output falling edge in RS-485 Loopback mode | MODE2 = MODE1 = MODE0 = Vio; SLR = Vio, Delay from 50% of L3 falling edge to 50% L2 falling edge, SHDN = Vio, TERM_TX and TERM_RX float, Load cap on L2 = 15 pF, Load on Driver output terminals (R2-R1) = 54 Ω | 1060 | 1770 | ns | ||
| tSKEW_RS485_LB | Pulse skew from logic input to logic output in RS485 loopback mode | |tLB_RS485_rising - tLB_RS485_falling|, SLR = Vio | 5 | 50 | ns | ||