The TIC10024-Q1 includes a CRC module to support redundancy checks on the configuration registers to ensure the integrity of data. The CRC calculation is based on the ITU-T X.25 implementation, and the CRC polynomial (0x1021) used is popularly known as CRC-CCITT-16 since it was initially proposed by the ITU-T (formerly CCITT) committee. The CRC calculation rule is defined in Table 8-3:

The CRC calculation is done on all the configuration registers starting from register CONFIG and ending at register INT_EN_CFG0 (address 1Ah through 24h). The device substitutes a “zero” for each reserved configuration register bit during the CRC calculation. The CRC calculation can be triggered by asserting the CRC_T bit in the CONFIG register. Once completed, the CRC_CALC interrupt bit in the INT_STAT register is asserted and an interrupt is issued. The 16-bit CRC calculation result is stored in the register CRC. This interrupt can be disabled by de-asserting the CRC_CALC_EN bit in the INT_EN_CFG0 register. It is important to avoid writing data to the configuration registers when the device is undergoing CRC calculations to prevent false calculation results.

Figure 8-10 shows the block diagram of the CRC module. The module consists of 16 shift-registers and 3 exclusive-OR gates. The registers start with 1111-1111-1111-1111 (or FFFFh) and the module performs an XOR function and shifts its content until the last bit of the register string is used. The final register’s content after the last data bit is the calculated CRC value of the data set and the content is stored in the CRC register.

Note the CRC_T bit self-clears after the CRC calculation is completed. Logic 1 is used for CRC_T bit during CRC calculation.

Figure 8-10 CCITT-16 CRC Module Block Diagram