SLVS529D April   2004  – January 2015 TL1431-EP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Dissipation Rating Table
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8 Parameter Measurement Information

tes_cr_vka_lvs529.gif
Figure 8. Test Circuit for V(KA) = Vref
test_cr_ioff_lvs529.gif
Figure 10. Test Circuit for Ioff
test_cr_vka2_lvs529.gif
Figure 9. Test Circuit for V(KA) > Vref
D008_SLVS529.gif
Figure 11. Equivalent Input-Noise Voltage Over a 10-s Period
fig11_lvs529.gif
Figure 12. Test Circuit for 0.1- to 10-Hz Equivalent Input-Noise Voltage
D009_SLVS529.gif
Figure 13. Small-Signal Voltage Amplification vs Frequency
D010_SLVS529.gif
Figure 15. Reference Impedance vs Frequency
D011_SLVS529.gif
Figure 17. Pulse Response
D012_SLVS529.gif
Figure 19. Stability Boundary Conditions
fig12_lvs529.gif
Figure 14. Test Circuit for Voltage Amplification
fig13_lvs529.gif
Figure 16. Test Circuit for Reference Impedance
fig14a_lvs529.gif
Figure 18. Test Circuit for Pulse Response
fig15_lvs529.gifFigure 20. Test Circuits for Curves A through D
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