SLVS052I April 1988 – September 2016 TL594
PRODUCTION DATA.
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The design of the TL594 not only incorporates the primary building blocks required to control a switching power supply, but also addresses many basic problems and reduces the amount of additional circuitry required in the total design. The TL594 is a fixed-frequency pulse-width-modulation (PWM) control circuit. Modulation of output pulses is accomplished by comparing the sawtooth waveform created by the internal oscillator on the timing capacitor (CT) to either of two control signals. The output stage is enabled during the time when the sawtooth voltage is greater than the voltage control signals. As the control signal increases, the time during which the sawtooth input is greater decreases; therefore, the output pulse duration decreases. A pulse-steering flip-flop alternately directs the modulated pulse to each of the two output transistors.
The error amplifiers have a common-mode voltage range of –0.3 V to VCC – 2 V. The DTC comparator has a fixed offset that provides approximately 5% dead time. The on-chip oscillator can be bypassed by terminating RT to the reference output and providing a sawtooth input to CT, or it can be used to drive the common circuitry in synchronous multiple-rail power supplies. For more information on the operation of the TL594, see Designing Switching Voltage Regulators With the TL494 (SLVA001).
The TL594 internal 5-V reference regulator output is the REF pin. In addition to providing a stable reference, it acts as a preregulator and establishes a stable supply from which the output-control logic, pulse-steering flip-flop, oscillator, dead-time control comparator, and PWM comparator are powered. The regulator employs a band-gap circuit as its primary reference to maintain thermal stability of less than 100-mV variation over the operating free-air temperature range of 0°C to 70°C. Short-circuit protection is provided to protect the internal reference and preregulator; 10 mA of load current is available for additional bias circuits. The reference is internally programmed to an initial accuracy of ±1% and maintains a stability of less than 25-mV variation over an input voltage range of 7 V to 40 V. For input voltages less than 7 V, the regulator saturates within 1 V of the input and tracks it.
The TL594 has circuitry to provide an undervoltage-lockout functionality. A minimum recommended VCC voltage of 7 V is recommended for operation, but if the VCC voltage drops below 6 V during operation, then the device shuts off. See Electrical Characteristics for additional information regarding the undervoltage lockout circuitry.
The oscillator provides a positive sawtooth waveform to the dead-time and PWM comparators for comparison to the various control signals.
The frequency of the oscillator is programmed by selecting timing components RT and CT. The oscillator charges the external timing capacitor, CT, with a constant current, the value of which is determined by the external timing resistor, RT. This produces a linear-ramp voltage waveform. When the voltage across CT reaches 3 V, the oscillator circuit discharges it, and the charging cycle is reinitiated. The charging current is determined by Equation 1.
The period of the sawtooth waveform is Equation 2.
The frequency of the oscillator becomes Equation 3.
However, the oscillator frequency is equal to the output frequency only for single-ended applications. For push-pull applications, the output frequency is one-half the oscillator frequency.
Single-ended applications are calculated with Equation 4.
Push-pull applications are calculated with Equation 5.
The dead-time control input provides control of the minimum dead time (off time). The output of the comparator inhibits switching transistors Q1 and Q2 when the voltage at the input is greater than the ramp voltage of the oscillator. An internal offset of 110 mV ensures a minimum dead time of approximately 3% with the dead-time control input grounded. Applying a voltage to the dead-time control input can impose additional dead time. This provides a linear control of the dead time from its minimum of 3% to 100% as the input voltage is varied from 0 V to 3.3 V, respectively. With full-range control, the output can be controlled from external sources without disrupting the error amplifiers. The dead-time control input is a relatively high-impedance input (II < 10 µA) and must be used where additional control of the output duty cycle is required. However, for proper control, the input must be terminated. An open circuit is an undefined condition.
The comparator is biased from the 5-V reference regulator. This provides isolation from the input supply for improved stability. The input of the comparator does not exhibit hysteresis, so protection against false triggering near the threshold must be provided. The comparator has a response time of 400 ns from either of the control-signal inputs to the output transistors, with only 100 mV of overdrive. This ensures positive control of the output within one-half cycle for operation within the recommended 300-kHz range.
The comparator also provides modulation control of the output pulse width. For this, the ramp voltage across timing capacitor CT is compared to the control signal present at the output of the error amplifiers. The timing capacitor input incorporates a series diode that is omitted from the control signal input. This requires the control signal (error amplifier output) to be approximately 0.7 V greater than the voltage across CT to inhibit the output logic, and ensures maximum duty cycle operation without requiring the control voltage to sink to a true ground potential. The output pulse width varies from 97% of the period to 0 as the voltage present at the error amplifier output varies from 0.5 V to 3.5 V, respectively.
Both high-gain error amplifiers receive their bias from the VI supply rail. This permits a common-mode input voltage range from –0.3 V to 2 V less than VI. Both amplifiers behave characteristically of a single-ended single-supply amplifier, in that each output is active high only. This allows each amplifier to pull up independently for a decreasing output pulse-width demand. With both outputs ORed together at the inverting input node of the PWM comparator, the amplifier demanding the minimum pulse out dominates. The amplifier outputs are biased low by a current sink to provide maximum pulse width out when both amplifiers are biased off.
The output-control input determines whether the output transistors operate in parallel or push-pull. This input is the supply source for the pulse-steering flip-flop. The output-control input is asynchronous and has direct control over the output, independent of the oscillator or pulse-steering flip-flop. The input condition is intended to be a fixed condition that is defined by the application. For parallel operation, the output-control input must be grounded. This disables the pulse-steering flip-flop and inhibits its outputs. In this mode, the pulses seen at the output of the dead-time control or PWM comparator are transmitted by both output transistors in parallel. For push-pull operation, the output-control input must be connected to the internal 5-V reference regulator. Under this condition, each of the output transistors is enabled, alternately, by the pulse-steering flip-flop.
Two output transistors are available on the TL594. Both transistors are configured as open collector/open emitter, and each is capable of sinking or sourcing up to 200 mA. The transistors have a saturation voltage of less than 1.3 V in the common-emitter configuration and less than 2.5 V in the emitter-follower configuration. The outputs are protected against excessive power dissipation to prevent damage, but do not employ sufficient current limiting to allow them to be operated as current-source outputs.
When the OUTPUT CTRL pin is tied to ground, the TL594 is operating in single-ended or parallel mode. When the OUTPUT CTRL pin is tied to VREF, the TL594 is operating in normal push-pull operation (see Table 1).
INPUT | OUTPUT FUNCTION |
---|---|
OUTPUT CTRL | |
VI = 0 | Single-ended or parallel output |
VI = Vref | Normal push-pull operation |