ZHCSPI8D November   2021  – July 2022 TLC6984

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 说明（续）
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Independent and Stackable Mode
        1. 8.3.1.1 Independent Mode
        2. 8.3.1.2 Stackable Mode
      2. 8.3.2 Current Setting
        1. 8.3.2.1 Brightness Control (BC) Function
        2. 8.3.2.2 Color Brightness Control (CC) Function
        3. 8.3.2.3 Choosing BC/CC for a Different Application
      3. 8.3.3 Frequency Multiplier
      4. 8.3.4 Line Transitioning Sequence
      5. 8.3.5 Protections and Diagnostics
        1. 8.3.5.1 Thermal Shutdown Protection
        2. 8.3.5.2 IREF Resistor Short Protection
        3. 8.3.5.3 LED Open Load Detection and Removal
          1. 8.3.5.3.1 LED Open Detection
          2. 8.3.5.3.2 Read LED Open Information
          3. 8.3.5.3.3 LED Open Caterpillar Removal
        4. 8.3.5.4 LED Short and Weak Short Circuitry Detection and Removal
          1. 8.3.5.4.1 LED Short and Weak Short Detection
          2. 8.3.5.4.2 Read LED Short Information
          3. 8.3.5.4.3 LSD Caterpillar Removal
    4. 8.4 Device Functional Modes
    5. 8.5 Continuous Clock Series Interface
      1. 8.5.1 Data Validity
      2. 8.5.2 CCSI Frame Format
      3. 8.5.3 Write Command
        1. 8.5.3.1 Chip Index Write Command
        2. 8.5.3.2 VSYNC Write Command
        3. 8.5.3.3 MPSM Write Command
        4. 8.5.3.4 Standby Clear and Enable Command
        5. 8.5.3.5 Soft_Reset Command
        6. 8.5.3.6 Data Write Command
      4. 8.5.4 Read Command
    6. 8.6 PWM Grayscale Control
      1. 8.6.1 Grayscale Data Storage and Display
        1. 8.6.1.1 Memory Structure Overview
        2. 8.6.1.2 Details of Memory Bank
        3. 8.6.1.3 Write a Frame Data into Memory Bank
      2. 8.6.2 PWM Control for Display
    7. 8.7 Register Maps
      1. 8.7.1  FC0
      2. 8.7.2  FC1
      3. 8.7.3  FC2
      4. 8.7.4  FC3
      5. 8.7.5  FC4
      6. 8.7.6  FC14
      7. 8.7.7  FC15
      8. 8.7.8  FC16
      9. 8.7.9  FC17
      10. 8.7.10 FC18
      11. 8.7.11 FC19
      12. 8.7.12 FC20
      13. 8.7.13 FC21
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 System Structure
        2. 9.2.1.2 SCLK Frequency
        3. 9.2.1.3 Internal GCLK Frequency
        4. 9.2.1.4 Line Switch Time
        5. 9.2.1.5 Blank Time Removal
        6. 9.2.1.6 BC and CC
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Chip Index Command
        2. 9.2.2.2 FC Registers Settings
        3. 9.2.2.3 Grayscale Data Write
        4. 9.2.2.4 VSYNC Command
        5. 9.2.2.5 LED Open and Short Read
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.7.5 FC4

FC4 is shown in Figure 8-33 and described in Table 8-11.

Figure 8-33 FC4 Register
47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RESERVED DE_COUPLE3_EN DE_COUPLE3 DE_COUPLE2 FIRST_LINE_DIM CAURSE_B CAURSE_G CAURSE_R
R-000b R/W-0b R/W-1000b R/W-0b R/W-0000b R/W-0b R/W-0b R/W-0b
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESERVED SR_ON_B SR_ON_G SR_ON_R SR_OFF_B SR_OFF_G SR_OFF_R FINE_B FINE_G FINE_R
R/W-0000b R/W-01b R/W-01b R/W-01b R/W-0b R/W-0b R/W-0b R/W-0b R/W-0b R/W-0b
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED SCAN_REV RESERVED IMAX LAST_SOUT
R/W-0b R/W-1b R/W-0000 0000 1111b R/W-0b R/W-0b
Table 8-11 FC4 Register Field Descriptions
Bit Field Type Reset Description
0 LAST_SOUT R/W 0b Enable or disable the last device's SOUT cut-off function
0b: disabled, last chip's SOUT shift out
1b: enabled, last chip's SOUT cut off, except for READ command
1 IMAX R/W 0b Set the maximum current of each channel
0b: 10mA maximum
01b: 20 mA maximum
13-2 RESERVED R/W 0000 0000 1111b
14 SCAN_REV R/W 1b When 2 device stackable or 3 devices stackable, the scan lines PCB layout is reversed. For the proper scan and SRAM read sequence, SCAN_REV register is provided.
0b: the PCB layout sequence is L0-L15, L16-L31.
1b: the PCB layout sequence is L0-L15, L31-L16.
15 RESERVED R/W 0b
16 FINE_R R/W 0b Enable the Red brightness compensation level fine range
0b: disable.
1b: enable.
17 FINE_G R/W 0b Enable the Green brightness compensation level fine range
0b: disable.
1b: enable.
18 FINE_B R/W 0b Enable the Blue brightness compensation level fine range
0b: disable.
1b: enable.
19 SR_OFF_R R/W 0b Slew rate control function when Red turns off operation
0b: slow slew rate.
1b: fast slew rate.
20 SR_OFF_G R/W 0b Slew rate control function when Green turns off operation
0b: slow slew rate.
1b: fast slew rate.
21 SR_OFF_B R/W 0b Slew rate control function when Blue turns off operation
0b: slow slew rate.
1b: fast slew rate.
23-22 SR_ON_R R/W 01b Slew rate control function when Red turns on operation
00b: the slower slew rate.
01b: slow slew rate.
10b: fast slew rate.
11b: the faster slew rate.
25-24 SR_ON_G R/W 01b Slew rate control function when Green turns on operation
00b: the slower slew rate.
01b: slow slew rate.
10b: fast slew rate.
11b: the faster slew rate.
27-26 SR_ON_B R/W 01b Slew rate control function when Blue turns on operation
00b: the slower slew rate.
01b: slow slew rate.
10b: fast slew rate.
11b: the faster slew rate.
31-28 RESERVED R/W 0000b
32 CAURSE_R R/W 0b Enable the Red brightness compensation level caurse tange
0b: disabled
1b: enabled
33 CAURSE_G R/W 0b Enable the Green brightness compensation level caurse tange
0b: disabled
1b: enabled
34 CAURSE_B R/W 0b Enable the Blue brightness compensation level caurse tange
0b: disabled
1b: enabled
38-35 FIRST_LINE_DIM R/W 0000b Adjust the first line dim level
0000b: level 1
...
0111b: level 8
...
1111b: level 16
39 DE_COUPLE2 R/W 0b Decoupling between ON and OFF channels
0b: disabled
1b: enabled
43-40 DE_COUPLE3 R/W 1000b Set decoupling enhancement level
0000b: level 1
...
0111b: level 8
...
1111b: level 16
44 DE_COUPLE3_EN R/W 0b Enable decoupling enhancement
0b: disabled
1b: enabled
47-45 RESERVED R/W 000b
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