ZHCSLG4B July 2020 – May 2022 TLIN1027-Q1
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 LIN (Local Interconnect Network) Bus
- 8.3.2 TXD (Transmit Input and Output)
- 8.3.3 RXD (Receive Output)
- 8.3.4 VSUP (Supply Voltage)
- 8.3.5 GND (Ground)
- 8.3.6 EN (Enable Input)
- 8.3.7 Protection Features
- 8.3.8 Bus Stuck Dominant System Fault: False Wake-Up Lockout
- 8.3.9 Thermal Shutdown
- 8.3.10 Under Voltage on VSUP
- 8.3.11 Unpowered Device and LIN Bus
- 8.4 Device Functional Modes
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
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- DRB|8
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9.2.3 Application Curves
The below figures show the propagation delay from the TXD pin to the LIN pin for both dominant to recessive and recessive to dominant stated under lightly loaded conditions.
Figure 9-2 Recessive to Dominant Propagation
Figure 9-3 Dominant to Recessive Propagation