ZHCSLG4B
July 2020 – May 2022
TLIN1027-Q1
PRODUCTION DATA
1
特性
2
应用
3
说明
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
ESD Ratings - IEC
6.4
Thermal Information
6.5
Recommended Operating Conditions
6.6
Electrical Characteristics
6.7
Switching Characteristics
6.8
Timing Requirements
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
LIN (Local Interconnect Network) Bus
8.3.1.1
LIN Transmitter Characteristics
8.3.1.2
LIN Receiver Characteristics
8.3.1.2.1
Termination
8.3.2
TXD (Transmit Input and Output)
8.3.3
RXD (Receive Output)
8.3.4
VSUP (Supply Voltage)
8.3.5
GND (Ground)
8.3.6
EN (Enable Input)
8.3.7
Protection Features
8.3.8
Bus Stuck Dominant System Fault: False Wake-Up Lockout
8.3.9
Thermal Shutdown
8.3.10
Under Voltage on VSUP
8.3.11
Unpowered Device and LIN Bus
8.4
Device Functional Modes
8.4.1
Normal Mode
8.4.2
Sleep Mode
8.4.3
Standby Mode
8.4.4
Wake-Up Events
8.4.4.1
Wake-Up Request (RXD)
8.4.4.2
Mode Transitions
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedures
9.2.2.1
Normal Mode Application Note
9.2.2.2
Standby Mode Application Note
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
支持资源
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
术语表
13
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
D|8
MSOI002K
DRB|8
MPDS118K
散热焊盘机械数据 (封装 | 引脚)
DRB|8
QFND619
订购信息
zhcslg4b_oa
zhcslg4b_pm
7
Parameter Measurement Information
Figure 7-1
Test System: Operating Voltage Range with RX and TX Access: Parameters 9, 10
Figure 7-2
RX Response: Operating Voltage Range
Figure 7-3
LIN Bus Input Signal
Figure 7-4
LIN Receiver Test with RX access Param 17, 18, 19, 20
Figure 7-5
V
SUP_NON_OP
Param
11
Figure 7-6
Test Circuit for I
BUS_LIM
at Dominant State (Driver on) Param 12
Figure 7-7
Test Circuit for I
BUS_PAS_dom
; TXD = Recessive State V
BUS
= 0 V, Param 13
Figure 7-8
Test Circuit for I
BUS_PAS_rec
Param 14
Figure 7-9
Test Circuit for I
BUS_NO_GND
Loss of GND
Figure 7-10
Test Circuit for I
BUS_NO_BAT
Loss of Battery
Figure 7-11
Test Circuit Slope Control and Duty Cycle Param
27, 28, 29, 30
Figure 7-12
Definition of Bus Timing Parameters
Figure 7-13
Propagation Delay Test Circuit; Param 31, 32
Figure 7-14
Propagation Delay
Figure 7-15
Mode Transitions
Figure 7-16
Wake-up Through EN
Figure 7-17
Wake-up through LIN
Figure 7-18
Test Circuit for AC Characteristics
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