The WAKE terminal defaults to bi-directional input but can be configured for rising edge and falling edge transitions by using register 8'h11[7:6] WAKE_CONFIG (see Figure 8-44 and Figure 8-45). Once the device enters sleep mode the WAKE terminal voltage level needs to be at either a low state or high state for t_WAKE before a state transition for a WAKE input can be determined. A pulse width less than t_{WAKE_INVALID} is filtered out.

The LWU circuitry is active in sleep mode, standby and fail-safe modes. If a valid LWU event occurs, the device transitions to restart mode. The LWU circuitry is not active in normal, fast and restart modes. To minimize system level current consumption, the internal bias voltages of the terminal follows the state on the terminal with a delay of t_WAKE. A constant low level on WAKE has an internal pull-down to ground. On power up, this may look like a LWU event and could be flagged as such. The device provides a WAKE pin status change update using register 8'h11[5:4]. The status change will lock in a change in the WAKE pin and needs to be cleared.

The WAKE terminal can be configured for a pulse, see Figure 8-46, by using WAKE_CONFIG register 11h[7:6]. The terminal can be configured to work off a pulse only. The pulse must be between t_{WK_WIDTH_MIN} and t_{WK_WIDTH_MAX}, see Figure 8-46. This figure provides three examples of pulses and whether the device will wake or not wake. t_{WK_WIDTH_MIN} is determined by the value for t_{WK_WIDTH_INVALID} is set to in register 8'h11[3:2]. There are two regions where a pulse may or may not be detected. By using register 8'h1B[1], WAKE_WIDTH_MAX_DIS, the pulse mode can be configured as a filtered wake input. Writing a 1b to this bit disables t_{WK_WIDTH_MAX}, and the WAKE input is based upon the configuration of register 8'h11[3:2] which selects a t_{WK_WIDTH_INVALID} and t_{WK_WIDTH_MIN} value. A WAKE input of less than t_{WK_WIDTH_INVALID} is filtered out, and if longer than t_{WK_WIDTH_MIN} INH turns on and device enters standby mode. The region between the two may or may not be counted, see Figure 8-47. Register 8'h12[7] determines the direction of the pulse or filter edge that is recognized. The status of the WAKE pin can be determined from register 8'h11[5:4]. When a WAKE pin change takes place, the device registers the change as a rising edge or falling edge. This is latched until a 00b is written to the bits.