ZHCSQ68A May 2022 – December 2022 TLIN1431-Q1
PRODUCTION DATA
The VCC pin is the current limited regulated output based supporting an accuracy of ±2.5%. In the event that the regulator drops out of regulation, the output tracks the input minus a drop based on the load current. When the input voltage drops below the UVSUP threshold, the regulator turns off until the input voltage returns above the UVSUPR level. When 5 V LDO is used, the device uses the voltage regulator during Init mode to determine the WKRQ/INH function, and the IO voltage. The device monitors VCC for under-voltage, over-voltage, short to ground and thermal events. The device control method and whether fail-safe mode is enabled determine the behavior of the of the device for these events. Fail-safe mode is always active when the device is in pin control. In SPI control, the state diagram shows two paths: fail-safe mode enabled and fail-safe mode disabled. The path followed depends on whether fail-safe mode is enabled or disabled in 8'h17[0] FSM_DIS.
For an under-voltage event, VCC is less than or equal to UVCCF. After a 30us filter time, the device pulls nRST low and after the tUVFLTR time, the interrupt flag is set and device transitions to restart mode, if fail-safe disabled, or fail-safe mode. When entering either mode, the SWE timer tINACT_FS starts, and, in SPI control, the mode counter increments and the appropriate interrupt flags are set. To exit fail-safe mode, the under-voltage has to clear and a wake event takes place prior to the SWE timer timing out. If the under-voltage event has not cleared when the wake event takes place or if the SWE timer times out, the device enters sleep mode. Figure 8-13 shows how a UVCC event is handled..
For an over-voltage event, OVCC, the device turns off the VCC LDO, and transitions to either sleep mode, fail-safe mode disabled, or fail-safe mode. When a wake event takes place, the VCC LDO is turned on for tLDOON to determine if the over-voltage is still present. If cleared, the device enters restart mode from either sleep or fail-safe modes. When in fail-safe mode, if the over-voltage has not cleared when the wake event takes place the device transitions to sleep mode.