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ZHCSFO7A November 2016 – May 2018 TLV170 , TLV2170 , TLV4170

PRODUCTION DATA.

Distribution taken from 400 amplifiers

Figure 1. Offset Voltage Production Distribution

5 typical units shown

Figure 3. Offset Voltage vs Common-Mode Voltage
(Upper Stage)

Figure 5. Output Voltage Swing vs Output Current (Maximum Supply)

Figure 7. 0.1-Hz to 10-Hz Noise

Figure 9. Quiescent Current vs Supply Voltage

Figure 11. Closed-Loop Gain vs Frequency

Figure 13. Open-Loop Output Impedance vs Frequency

100-mV output step, R_L = 10 kΩ, G = –1

Figure 15. Small-Signal Overshoot vs Capacitive Load

R_L = 10 kΩ, C_L = 10 pF, G = +1

Figure 17. Small-Signal Step Response (100 mV)

G = +1, R_L = 10 kΩ, C_L = 10 pF

Figure 19. Large-Signal Step Response

10-V positive step, G = +1

Figure 21. Large-Signal Settling Time

Figure 23. Short-Circuit Current vs Temperature

PRP = –10 dBm, VS = ±18 V, VCM = 0 V

Figure 25. EMIRR IN+ vs Frequency

5 typical units shown

Figure 2. Offset Voltage vs Common-Mode Voltage

Figure 4. Input Bias Current vs Temperature

Figure 6. CMRR and PSRR vs Frequency
(Referred-to Input)

Figure 8. Input Voltage Noise Spectral Density vs Frequency

Figure 10. Open-Loop Gain and Phase vs Frequency

Figure 12. Open-Loop Gain vs Temperature

100-mV output step, R_L = 10 kΩ, G = +1

Figure 14. Small-Signal Overshoot vs Capacitive Load

Figure 16. No Phase Reversal

R_L = 10 kΩ, C_L = 10 pF, G = –1

Figure 18. Small-Signal Step Response (100 mV)

G = –1, R_L = 10 kΩ, C_L = 10 pF

Figure 20. Large-Signal Step Response

10-V negative step, G = –1

Figure 22. Large-Signal Settling Time

Figure 24. Maximum Output Voltage vs Frequency