SNOSDG6 September   2024 TLV1831-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1.     Pin Configuration: TLV1831-Q1 and TLV1841-Q1
    2.     Pin Configurations: TLV1832-Q1 and TLV1842-Q1
    3.     Pin Configuration and Functions: TLV1834-Q1 and TLV1844-Q1
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Inputs
        1. 6.4.1.1 Rail-to-Rail Input
        2. 6.4.1.2 Unused Inputs
      2. 6.4.2 Outputs
        1. 6.4.2.1 TLV183x-Q1 Push-Pull Output
        2. 6.4.2.2 TLV184x-Q1 Open-Drain Output
      3. 6.4.3 ESD Protection
        1. 6.4.3.1 Inputs
        2. 6.4.3.2 Outputs
      4. 6.4.4 Power-On Reset (POR)
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Basic Comparator Definitions
        1. 7.1.1.1 Operation
        2. 7.1.1.2 Propagation Delay
        3. 7.1.1.3 Overdrive Voltage
      2. 7.1.2 Hysteresis
        1. 7.1.2.1 Inverting Comparator With Hysteresis
        2. 7.1.2.2 Non-Inverting Comparator With Hysteresis
        3. 7.1.2.3 Inverting and Non-Inverting Hysteresis using Open-Drain Output
    2. 7.2 Typical Applications
      1. 7.2.1 Window Comparator
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Square Wave Oscillator
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Performance Plots
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5.5 Electrical Characteristics

For VS (TOTAL SUPPLY VOLTAGE) = (V+) – (V–) = 12V, VCM = VS/2 at TA = 25°C (Unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage TA = 25°C –2.5 ±0.3 2.5 mV
TA = –40°C to +125°C –3.0 3.0 mV
dVIO/dT Input offset voltage drift TA = –40°C to +125°C ±1.2 µV/°C
POWER SUPPLY
IQ Quiescent current per comparator,
TLV18x1 Only 		 No Load, Output High TA =  25°C
TLV1831, TLV1841		 75 100 µA
No Load, Output High TA = –40°C to +125°C
TLV1831, TLV1841		 105 µA
No Load, Output Low TA =  25°C
TLV1831, TLV1841		 100 135 µA
No Load, Output Low TA = –40°C to +125°C
TLV1831, TLV1841		 140 µA
IQ Quiescent current per comparator No Load, Output High
TA =  25°C		 75 95 µA
No Load, Output High
TA = –40°C to +125°C		 100 µA
No Load, Output Low
TA =  25°C		 95 130 µA
No Load, Output Low
TA = –40°C to +125°C		 135 µA
VPOR 1.9 V
INPUT BIAS CURRENT
IB Input bias current (1) 500 pA
IB Input bias current (1) (2) TA = –40°C to +125°C -5 5 nA
IOS Input offset current 10 pA
INPUT CAPACITANCE
CID Input Capacitance, Differential 5 pF
CIC Input Capacitance, Common Mode 5 pF
INPUT COMMON MODE RANGE
VCM-Range Common-mode voltage range VS = 2.7 V to 40 V
TA = –40°C to +125°C		 (V–) – 0.2 (V+) + 0.2 V
OUTPUT
VOL Voltage swing from (V–) ISINK = 4 mA
TA = –40°C to +125°C		 400 mV
VOH Voltage swing from (V+) (for Push-Pull only) ISOURCE = 4 mA
TA = –40°C to +125°C		 400 mV
ILKG Open-drain output leakage current VID = +0.1 V, VPULLUP = (V+)
TA = –40°C to +125°C		 3 70 nA
IOL Short-circuit current Sinking
TA = –40°C to +125°C		 30 mA
IOH Short-circuit current Sourcing
TA = –40°C to +125°C		 30 mA
(1) Please see figure for IBIAS vs VID performance curve
(2) This parameter is specified by design and/or characterization and is not tested in production.
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