ZHCSEN0A February   2016  – September 2016 TLV2316 , TLV316 , TLV4316

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用范围
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: TLV316
    5. 7.5 Thermal Information: TLV2316
    6. 7.6 Thermal Information: TLV4316
    7. 7.7 Electrical Characteristics
    8. 7.8 Typical Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Rail-to-Rail Input
      3. 8.3.3 Rail-to-Rail Output
      4. 8.3.4 Common-Mode Rejection Ratio (CMRR)
      5. 8.3.5 Capacitive Load and Stability
      6. 8.3.6 EMI Susceptibility and Input Filtering
      7. 8.3.7 Overload Recovery
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 System Examples
  10. 10Power Supply Recommendations
    1. 10.1 Input and ESD Protection
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档　
    2. 12.2 相关链接
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Pin Configuration and Functions

DBV Package
5-Pin SOT-23
Top View
TLV316 TLV2316 TLV4316 po_sot23-5_bos406.gif
DCK Package
5-Pin SC70
Top View
TLV316 TLV2316 TLV4316 po_sc70_bos406.gif

Pin Functions: TLV316

PIN I/O DESCRIPTION
NAME DBV (SOT-23) DCK (SC70)
–IN 4 3 I Inverting input
+IN 3 1 I Noninverting input
OUT 1 4 O Output
V– 2 2 — Negative (lowest) supply or ground (for single-supply operation)
V+ 5 5 — Positive (highest) supply
D, DGK Packages
8-Pin SOIC, VSSOP
Top View
TLV316 TLV2316 TLV4316 po_so_msop_bos406.gif

Pin Functions: TLV2316

PIN I/O DESCRIPTION
NO. NAME
2 –IN A I Inverting input, channel A
3 +IN A I Noninverting input, channel A
6 –IN B I Inverting input, channel B
5 +IN B I Noninverting input, channel B
1 OUT A O Output, channel A
7 OUT B O Output, channel B
4 V– — Negative (lowest) supply or ground (for single-supply operation)
8 V+ — Positive (highest) supply
D, PW Packages
14-Pin SOIC, TSSOP
Top View
TLV316 TLV2316 TLV4316 po_pw_tssop-14_bos563.gif

Pin Functions: TLV4316

PIN I/O DESCRIPTION
NO. NAME
2 –IN A I Inverting input, channel A
3 +IN A I Noninverting input, channel A
6 –IN B I Inverting input, channel B
5 +IN B I Noninverting input, channel B
9 –IN C I Inverting input, channel C
10 +IN C I Noninverting input, channel C
13 –IN D I Inverting input, channel D
12 +IN D I Noninverting input, channel D
1 OUT A O Output, channel A
7 OUT B O Output, channel B
8 OUT C O Output, channel C
14 OUT D O Output, channel D
11 V– — Negative (lowest) supply or ground (for single-supply operation)
4 V+ — Positive (highest) supply
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