ZHCSJS1E September 2008 – September 2019 TLV320AIC3204
PRODUCTION DATA.
Device power consumption largely depends on PowerTune configuration.
The TLV320AIC3204 needs several power supplies for its operation.
The AVDD and LDOIN power inputs are used to power the analog circuits including analog to digital converters, digital to analog converters, programmable gain amplifiers, headphone amplifiers etc. The analog blocks in TLV320AIC3204 have high power supply rejection ratio, however it is recommended that these supplies be powered by well regulated power supplies like low dropout regulators (LDO) for optimal performance. When these power terminals are driven from a common power source, the current drawn from the source will depend upon blocks enabled inside the device. However as an example when all the internal blocks powered are enabled the source should be able to deliver 150mA of current.
The DVDD powers the digital core of TLV320AIC3204, including the audio serial interface, control interfaces (SPI or I2C), clock generation and PLL. The DVDD power can be driven by high efficiency switching regulators or low drop out regulators. When the PRB modes are used then the peak current load on DVDD supply source could be approximately 20 mA.
The IOVDD powers the digital input and digital output buffers of TLV320AIC3204. The current consumption of this power depends on configuration of digital terminals as inputs or outputs. When the digital terminals are configured as outputs, the current consumption would depend on switching frequency of the signal and the load on the output terminal, which depends on board design and input capacitance of other devices connected to the signal.
Refer to Figure 21 for recommendations on decoupling capacitors.
Refer to the application note SLAA492 for power supply sequencing information.
For more detailed information, see the TLV320AIC3204 Application Reference Guide,SLAA557.