SLAS538B October   2007  – November 2016 TLV320AIC34

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Hardware Reset
      2. 9.3.2  I2C Bus Debug In A Glitched System
      3. 9.3.3  Digital Audio Data Serial Interface
      4. 9.3.4  TDM Data Transfer
      5. 9.3.5  Audio Data Converters
      6. 9.3.6  Audio Clock Generation
      7. 9.3.7  Stereo Audio ADC
        1. 9.3.7.1 Stereo Audio ADC High-pass Filter
      8. 9.3.8  Digital Audio Processing For Record Path
      9. 9.3.9  Automatic Gain Control (AGC)
      10. 9.3.10 Stereo Audio DAC
      11. 9.3.11 Digital Audio Processing For Playback
      12. 9.3.12 Digital Interpolation Filter
      13. 9.3.13 Delta-Sigma Audio DAC
      14. 9.3.14 Audio DAC Digital Volume Control
      15. 9.3.15 Increasing DAC Dynamic Range
      16. 9.3.16 Analog Output Common-Mode Adjustment
      17. 9.3.17 Audio DAC Power Control
      18. 9.3.18 Audio Analog Inputs
      19. 9.3.19 Analog Input Bypass Path Functionality
      20. 9.3.20 ADC PGA Signal Bypass Path Functionality
      21. 9.3.21 Input Impedance and VCM Control
      22. 9.3.22 Passive Analog Bypass During Power Down
      23. 9.3.23 MICBIAS_x Generation
      24. 9.3.24 Digital Microphone Connectivity
      25. 9.3.25 Analog Fully Differential Line Output Drivers
      26. 9.3.26 Analog High-Power Output Drivers
      27. 9.3.27 Short-Circuit Output Protection
      28. 9.3.28 Jack or Headset Detection
      29. 9.3.29 Output Stage Volume Controls
    4. 9.4 Device Functional Modes
      1. 9.4.1 I2C Control Mode
      2. 9.4.2 Right-Justified Mode
      3. 9.4.3 Left-Justified Mode
      4. 9.4.4 I2S Mode
      5. 9.4.5 DSP Mode
    5. 9.5 Programming
      1. 9.5.1 Digital Control Serial Interface
    6. 9.6 Register Maps
      1. 9.6.1 Register Description
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Related Links
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • ZAS|87
散热焊盘机械数据 (封装 | 引脚)
订购信息

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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