The TLV40x1 transfer curve is shown in #SLVSCI79397.

• V_IT+ represents the positive-going input threshold that causes the comparator output to change from a logic low state to a logic high state.
• V_IT- represents the negative-going input threshold that causes the comparator output to change from a logic high state to a logic low state.
• V_HYS represents the difference between V_IT+ and V_IT- and is 20 mV for TLV40x1Ry and 54 mV for TLV4021S5x.

Figure 8-5 Transfer Curve

V_IT+ and V_IT- have mV's of variation over temperature. The significant portion of the variation of these parameters is a result of the internal bandgap voltage from which V_IT+ and V_IT- are derived. The following hysteresis histograms demonstrate the performance of the TLV40x1 hysteresis circuitry. Since the bandgap reference is used to set V_IT+ and V_IT-, each of these parameters have a tendency to error (track) in the same direction. For example, if V_IT+ has a positive 0.5% error, V_IT- would have a tendency to have a similar positive percentage error. As a result, the variation of hysteresis will never be equal to the difference of the highest V_IT+ value of its range and the lowest V_IT- value of its range.

Figure 8-6 V_HYST Histogram (TLV40x1R2, V_S=5V)

Figure 8-8 V_HYST Histogram (TLV40x1S5, V_S=5V)

Figure 8-7 V_HYST Histogram (TLV40x1R1, V_S=5V)