SUPPLY |
VIN |
Input voltage |
|
2.7 |
|
5.5 |
V |
IQ |
Quiescent current into VIN pin |
IOUT = 0 mA, Not switching |
|
50 |
|
uA |
VUVLO |
Under voltage lock out |
VIN falling |
|
2.2 |
2.3 |
V |
Under voltage lock out hysteresis |
|
|
200 |
|
mV |
TJSD |
Thermal shutdown |
Junction temperature rising |
|
150 |
|
°C |
Thermal shutdown hysteresis |
Junction temperature falling below TJSD |
|
20 |
|
LOGIC INTERFACE, TLV62565 |
VIH |
High-level input voltage |
2.7 V ≤ VIN ≤ 5.5 V |
1.2 |
|
|
V |
VIL |
Low-level input voltage |
2.7 V ≤ VIN ≤ 5.5 V |
|
|
0.4 |
V |
ISD |
Shutdown current into VIN pin |
EN = LOW |
|
0.1 |
1 |
µA |
IEN,LKG |
EN leakage current |
|
|
0.01 |
0.16 |
µA |
POWER GOOD, TLV62566 |
VPG |
Power Good low threshold |
VFB falling referenced to VFB nominal |
|
90% |
|
|
Power Good high threshold |
VFB risng referenced to VFB nominal |
|
95% |
|
VL |
Low level voltage |
Isink = 500 µA |
|
|
0.4 |
V |
IPG,LKG |
PG Leakage current |
VPG = 5.0 V |
|
0.01 |
0.17 |
µA |
OUTPUT |
VOUT |
Output voltage |
|
0.6 |
|
DMAX.VIN |
V |
VFB |
Feedback regulation voltage |
PWM operation, TA = -40°C to 85°C |
0.588 |
0.6 |
0.612 |
V |
PWM operation, TA = 85°C |
0.594 |
0.6 |
0.606 |
V |
PFM comparator threshold |
|
0.9% |
|
|
IFB |
Feedback input bias current |
VFB = 0.6 V |
|
10 |
100 |
nA |
RDS(on) |
High-side FET on resistance |
ISW = 500 mA, VIN = 3.6 V |
|
173 |
|
mΩ |
Low-side FET on resistance |
ISW = 500 mA, VIN = 3.6 V |
|
105 |
|
ILIM,LS |
Low-side FET valley current limit |
|
1.5 |
|
|
A |
ILIM,HS |
High-side FET peak current limit |
|
1.8 |
|
|
A |
fSW |
Switching frequency |
|
|
1.5 |
|
MHz |
DMAX |
Maximum duty cycle |
|
|
95% |
|
|
tOFF,MIN |
Minimum off time |
|
|
40 |
|
ns |