ZHCS844C November 2011 – June 2017 TLV70012-Q1 , TLV70018-Q1
PRODUCTION DATA.
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TLV70018-Q1 and TLV70012-Q1 consume low quiescent current and deliver excellent line and load transient performance. These characteristics, combined with low noise and very good PSRR with little (VIN – VOUT) headroom, make this family of devices ideal for portable RF applications. This family of regulators offers current limit and thermal protection, and is specified from –40°C to 125°C.
8.2 Typical Application
Figure 21. Simplified Schematic
8.2.1 Design Requirements
For this design example use, the parameters listed in Table 1 as the input parameters.
8.2.2 Detailed Design Procedure
8.2.2.1 Input and Output Capacitor Requirements
1.0-μF X5R- and X7R-type ceramic capacitors are recommended because these capacitors have minimal variation in value and equivalent series resistance (ESR) over temperature.
However, the TLV70018-Q1 and TLV70012-Q1 are designed to be stable with an effective capacitance of 0.1 μF or larger at the output. Thus, the device is stable with capacitors of other dielectric types as well, as long as the effective capacitance under operating bias voltage and temperature is greater than 0.1 μF. This effective capacitance refers to the capacitance that the LDO sees under operating bias voltage and temperature conditions; that is, the capacitance after taking both bias voltage and temperature derating into consideration. In addition to allowing the use of lower-cost dielectrics, this capability of being stable with 0.1-μF effective capacitance also enables the use of smaller-footprint capacitors that have higher derating in size- and space-constrained applications.
NOTE
Using a 0.1-μF rated capacitor at the output of the LDO does not ensure stability because the effective capacitance under the specified operating conditions would be less than 0.1 μF. Maximum ESR should be less than 200 mΩ.
Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1-μF to 1.0-μF, low ESR capacitor across the IN pin and GND pin of the regulator. This capacitor counteracts reactive input sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated, or if the device is not located close to the power source. If source impedance is more than 2 Ω, a 0.1-μF input capacitor may be necessary to ensure stability.
8.2.2.2 Transient Response
As with any regulator, increasing the size of the output capacitor reduces overshoot or undershoot magnitude but increases the duration of the transient response.
8.2.3 Application Curve
Figure 22. Power Up